[llvm-branch-commits] [llvm] [SelectionDAG] Fold extracts of subvector inserts (PR #201271)

[Matt Arsenault via llvm-branch-commits]

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@@ -0,0 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -O2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck %s
+
+target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048-n32:64-S32-A5-G1-ni:7:8:9"
+target triple = "amdgcn-amd-amdhsa"
+
+; Regression test for an infinite DAGCombine loop involving freeze sinking
+; through extract_subvector users of this shuffle/select chain.
+; See https://github.com/ROCm/llvm-project/issues/2616 for the original report.
+define amdgpu_kernel void @freeze_loop(<2 x i16> %0, i1 %1) {
+; CHECK-LABEL: freeze_loop:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0
+; CHECK-NEXT:    v_mov_b32_e32 v0, 0
+; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
+; CHECK-NEXT:    s_bitcmp1_b32 s1, 0
+; CHECK-NEXT:    s_cselect_b32 s0, s0, 0x10001
+; CHECK-NEXT:    v_mov_b32_e32 v1, s0
+; CHECK-NEXT:    ds_write_b32 v0, v1
+; CHECK-NEXT:    s_endpgm
+  %3 = shufflevector <2 x i16> %0, <2 x i16> zeroinitializer, <23 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %4 = select i1 %1, <23 x i16> %3, <23 x i16> zeroinitializer
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arsenm wrote:

Use named values in tests 

https://github.com/llvm/llvm-project/pull/201271