[llvm-branch-commits] [llvm] [TRI] Remove reserved registers in getRegPressureSetLimit (PR #211743)

[Lei Huang via llvm-branch-commits]

https://github.com/lei137 commented:

The AllocationOrder checks for F4RC (in aix-csr-alloc.mir) and VFRC (in aix64-csr-alloc.mir) are dropped here. I understand why — these were side effects of computePSetLimit calling RegisterClassInfo::compute() on every pressure set's largest RC, not genuine allocator demand, so they naturally disappear after this refactor. However, these were the only tests in the PPC test suite covering the allocation order for those two register classes on AIX. Could we add small MIR functions to each file that actually use an F4RC/VFRC virtual register to give these checks a legitimate trigger and preserve the coverage?



https://github.com/llvm/llvm-project/pull/211743