[llvm-branch-commits] [llvm] [RISCV] Support CodeGen of Zilx extension (PR #209420)

[Pengcheng Wang via llvm-branch-commits]

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@@ -671,7 +671,8 @@ static bool isSignExtendedW(Register SrcReg, const RISCVSubtarget &ST,
       return false;
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wangpc-pp wrote:

Thanks! I just forgot to do that.

https://github.com/llvm/llvm-project/pull/209420