[llvm-branch-commits] [llvm] PPC: Fix extsw elimination when the input reads a subregister (PR #208052)

[Matt Arsenault via llvm-branch-commits]

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@@ -1090,18 +1093,30 @@ bool PPCMIPeephole::simplifyCode() {
           // chain used to deduce sign extension to eliminate the 'extsw' will
           // need to be promoted to 64-bit pseudo instructions when the 'extsw'
           // is eliminated.
-          TII->promoteInstr32To64ForElimEXTSW(NarrowReg, MRI, 0, LV);
-
           LLVM_DEBUG(dbgs() << "Removing redundant sign-extension\n");
-          Register TmpReg =
-              MF->getRegInfo().createVirtualRegister(&PPC::G8RCRegClass);
-          BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF),
-                  TmpReg);
-          BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG),
-                  MI.getOperand(0).getReg())
-              .addReg(TmpReg)
-              .addReg(NarrowReg)
-              .addImm(PPC::sub_32);
+
+          if (NarrowSubReg) {
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arsenm wrote:

There's already an isSignExtended check above here

https://github.com/llvm/llvm-project/pull/208052