[llvm-branch-commits] [clang] [llvm] [X86][ACE] Add x86_bsr type and Block Scale Register support (PR #208706)

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ganeshgit wrote:

> If we decide to have this implementation, we can safely drop the no_bsr path.

1. I meant "no_bsr" path as the implicit path that the spec refers. It is retained here so that we have that as ref. As mentioned in the PR discussion, we shouldn't be mixing both explicit and implicit bsr paths. I prefer the explicit ones. If we agree, we can safely discard the implict ones (no_bsr). At present, both are there for deliberating! 

2. I can reorganize the PRs if that helps. Spilling is not implemented. Since bsr is a single register, I thought, we can insert spills before use. Hindsight, I think it is an oversight! I will get that done.



https://github.com/llvm/llvm-project/pull/208706