[llvm-branch-commits] [llvm] [InlineSpiller][AMDGPU] Implement subreg reload during RA spill (PR #175002)

[Christudasan Devadasan via llvm-branch-commits]

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@@ -1215,6 +1215,7 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
   virtual void loadRegFromStackSlot(
       MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,
       int FrameIndex, const TargetRegisterClass *RC, Register VReg,
+      unsigned SubReg = 0,
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cdevadas wrote:

I've posted a separate PR (#175581). Once this standalone PR is merged, I will rebase the stack to simplify the current PR.

https://github.com/llvm/llvm-project/pull/175002