[llvm-branch-commits] [llvm] [RISCV] Schedule RVV instructions with compatible type first (PR #95924)

Luke Lau via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Jan 7 23:13:41 PST 2026


================
@@ -13,6 +13,51 @@ using namespace llvm;
 
 #define DEBUG_TYPE "riscv-prera-sched-strategy"
 
+RISCV::VSETVLIInfo
+RISCVPreRAMachineSchedStrategy::getVSETVLIInfo(const MachineInstr *MI) const {
+  unsigned TSFlags = MI->getDesc().TSFlags;
+  if (!RISCVII::hasSEWOp(TSFlags))
+    return RISCV::VSETVLIInfo();
+  return VIA.computeInfoForInstr(*MI);
+}
+
+bool RISCVPreRAMachineSchedStrategy::tryVType(RISCV::VSETVLIInfo TryVType,
+                                              RISCV::VSETVLIInfo CandVtype,
+                                              SchedCandidate &TryCand,
+                                              SchedCandidate &Cand,
+                                              CandReason Reason) const {
+  // Do not compare the vtype changes between top and bottom
+  // boundary.
+  if (Cand.AtTop != TryCand.AtTop)
+    return false;
+
+  // Try Cand first.
+  // We prefer the top node as it is straightforward from the perspective of
+  // vtype dataflow.
+  if (CandVtype.isValid() && TopVType.isValid() && Cand.AtTop &&
+      CandVtype == TopVType)
----------------
lukel97 wrote:

Have you considered `CandVType.isCompatible(DemandedFields::all(), TopVType)`? That might catch some more cases. 

https://github.com/llvm/llvm-project/pull/95924


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