[llvm-branch-commits] [llvm] [RISCV] Schedule RVV instructions with compatible type first (PR #95924)

[Luke Lau via llvm-branch-commits]

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@@ -1834,6 +1843,10 @@ def TuneDisableLatencySchedHeuristic
     : SubtargetFeature<"disable-latency-sched-heuristic", "DisableLatencySchedHeuristic", "true",
                        "Disable latency scheduling heuristic">;
 
+def TuneEnableVTypeSchedHeuristic
+    : SubtargetFeature<"enable-vtype-sched-heuristic", "EnableVTypeSchedHeuristic", "true",
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lukel97 wrote:

Rename this something like `enable-vsetvli-sched-heuristic`?

https://github.com/llvm/llvm-project/pull/95924