[llvm-branch-commits] [llvm] [RISCV] Schedule RVV instructions with compatible type first (PR #95924)

[Min-Yih Hsu via llvm-branch-commits]

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@@ -45,6 +45,8 @@ class RISCVTuneInfo {
 
   // The direction of PostRA scheduling.
   code PostRASchedDirection = TopDown;
+
+  bit EnableVTypeSchedHeuristic = 0;
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mshockwave wrote:

hmmm I know we should probably do a better job managing all the (scheduler) knobs, but since `disable-latency-sched-heuristic` is already a subtarget feature, do you think vtype heuristic should be a subtarget feature as well?

https://github.com/llvm/llvm-project/pull/95924