[llvm-branch-commits] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)
Gheorghe-Teodor Bercea via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Aug 4 06:42:23 PDT 2026
================
@@ -4550,6 +4550,35 @@ bool AMDGPUInstructionSelector::selectStackRestore(MachineInstr &MI) const {
return true;
}
+bool AMDGPUInstructionSelector::selectRegLoadStore(MachineInstr &I) const {
+ // Remember where the selected machine instruction will land.
+ MachineBasicBlock::iterator II = std::next(I.getIterator());
+
+ if (!selectImpl(I, *CoverageInfo))
+ return false;
+
+ // On a movrel subtarget the selected V_LOAD_IDX / V_STORE_IDX expands to an
----------------
doru1004 wrote:
Done now.
https://github.com/llvm/llvm-project/pull/209541
More information about the llvm-branch-commits
mailing list