[llvm-branch-commits] [llvm] [AMDGPU] Lower loads and stores for address space 13 (PR #209541)

[Matt Arsenault via llvm-branch-commits]

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@@ -544,10 +547,23 @@ static bool loadStoreBitcastWorkaround(const LLT Ty) {
 
 static bool isLoadStoreLegal(const GCNSubtarget &ST, const LegalityQuery &Query) {
   const LLT Ty = Query.Types[0];
+  // VGPR ("as memory") accesses are never plain-legal; they are custom-lowered
+  // to G_AMDGPU_REG_LOAD/STORE.
+  if (Query.Types[1].getAddressSpace() == AMDGPUAS::VGPR)
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arsenm wrote:

This should go in isLoadStoreSizeLegal

https://github.com/llvm/llvm-project/pull/209541