[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)

[Alex Rønne Petersen via llvm-branch-commits]

alexrp wrote:

> Most backends use a subtarget feature to indicate whether unaligned access is allowed.

Just to back up this point:

```
❯ git grep -E 'SubtargetFeature<".*(align|ual).*"' */*.td
AArch64/AArch64Features.td:696:26:def FeatureStrictAlign : SubtargetFeature<"strict-align",
AArch64/AArch64Features.td:738:37:def FeatureSlowMisaligned128Store : SubtargetFeature<"slow-misaligned-128store",
AArch64/AArch64Features.td:874:29:def FeatureLdpAlignedOnly : SubtargetFeature<"ldp-aligned-only", "HasLdpAlignedOnly",
AArch64/AArch64Features.td:877:29:def FeatureStpAlignedOnly : SubtargetFeature<"stp-aligned-only", "HasStpAlignedOnly",
AArch64/AArch64Features.td:880:46:def FeatureUseFixedOverScalableIfEqualCost : SubtargetFeature<"use-fixed-over-scalable-if-equal-cost",
AMDGPU/AMDGPU.td:107:36:def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
AMDGPU/AMDGPU.td:119:37:def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
AMDGPU/AMDGPU.td:125:32:def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
AMDGPU/AMDGPU.td:238:31:def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
AMDGPU/AMDGPU.td:343:48:def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
AMDGPU/AMDGPU.td:419:35:def FeatureRequiresAlignedVGPRs : SubtargetFeature<"vgpr-align2",
AMDGPU/AMDGPU.td:1201:34:def FeatureBVHDualAndBVH8Insts : SubtargetFeature<"bvh-dual-bvh-8-insts",
AMDGPU/AMDGPU.td:1357:34:def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
ARM/ARMFeatures.td:339:29:def FeatureCheckVLDnAlign : SubtargetFeature<"vldn-align", "CheckVLDnAccessAlignment",
ARM/ARMFeatures.td:375:34:def FeaturePreferBranchAlign32 : SubtargetFeature<"loop-align", "PreferBranchLogAlignment","2",
ARM/ARMFeatures.td:378:34:def FeaturePreferBranchAlign64 : SubtargetFeature<"branch-align-64", "PreferBranchLogAlignment","3",
ARM/ARMFeatures.td:449:29:def FeatureVirtualization : SubtargetFeature<"virtualization",
ARM/ARMFeatures.td:457:29:def FeatureStrictAlign    : SubtargetFeature<"strict-align",
LoongArch/LoongArch.td:111:7:    : SubtargetFeature<"ual", "HasUAL", "true",
Mips/Mips.td:212:7:    : SubtargetFeature<"strict-align", "StrictAlign", "true",
PowerPC/PPC.td:241:3:  SubtargetFeature<"allow-unaligned-fp-access", "AllowsUnalignedFPAccess",
RISCV/RISCVFeatures.td:1781:6:   : SubtargetFeature<"unaligned-scalar-mem", "EnableUnalignedScalarMem",
RISCV/RISCVFeatures.td:1786:6:   : SubtargetFeature<"unaligned-vector-mem", "EnableUnalignedVectorMem",
X86/X86.td:198:30:def FeatureSSEUnalignedMem : SubtargetFeature<"sse-unaligned-mem",
X86/X86.td:493:25:def TuningSlowUAMem16 : SubtargetFeature<"slow-unaligned-mem-16",
X86/X86.td:497:25:def TuningSlowUAMem32 : SubtargetFeature<"slow-unaligned-mem-32",
```

https://github.com/llvm/llvm-project/pull/167013