[llvm-branch-commits] [llvm] [AMDGPU] Emit entry function Dwarf CFI (PR #164722)

[Scott Linder via llvm-branch-commits]

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@@ -10,6 +10,63 @@
 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX11 %s
 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX12 %s
 
+--- |
+  define void @v_add_co_u32_e32__inline_imm__fi_offset0() #0 { unreachable }
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slinder1 wrote:

I will take another look, but AFAICT there is no way to set it in MIR

https://github.com/llvm/llvm-project/pull/164722