[llvm-branch-commits] [llvm] CodeGen: Handle bundled instructions in two-address-instructions pass (PR #166212)

[Jay Foad via llvm-branch-commits]

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@@ -1665,6 +1665,22 @@ void TwoAddressInstructionImpl::processTiedPairs(MachineInstr *MI,
     // by SubRegB is compatible with RegA with no subregister. So regardless of
     // whether the dest oper writes a subreg, the source oper should not.
     MO.setSubReg(0);
+
+    // Update uses of RegB to uses of RegA inside the bundle.
+    if (MI->isBundle()) {
+      for (MachineInstr *InnerMI = MI; InnerMI->isBundledWithSucc();) {
+        InnerMI = InnerMI->getNextNode();
+
+        for (MachineOperand &MO : InnerMI->all_uses()) {
+          if (MO.isReg() && MO.getReg() == RegB) {
+            assert(
+                MO.getSubReg() == 0 &&
+                "tied subregister uses in bundled instructions not supported");
+            MO.setReg(RegA);
----------------
jayfoad wrote:

Then maybe assert that `MO.getSubReg() == 0 && SubRegB == 0`? Otherwise this code will replace a use of one reg with a use of another reg with a different size.

https://github.com/llvm/llvm-project/pull/166212