[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)
Fabian Ritter via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Jun 27 02:10:11 PDT 2025
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@@ -2230,7 +2230,7 @@ bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue Addr, SDValue &SBase,
SDValue N0, N1;
// Extract the base and offset if possible.
- if (CurDAG->isBaseWithConstantOffset(Addr) || Addr.getOpcode() == ISD::ADD) {
+ if (CurDAG->isBaseWithConstantOffset(Addr) || Addr->isAnyAdd()) {
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ritter-x2a wrote:
I think the code here isn't interested in the `Constant` part of `isBaseWithConstantOffset`; that's checked in `SelectSMRDOffset`. It should be fine (even better, in some hypothetical cases) to replace this call with an `isADDLike` call (which catches disjoint ors and an xor special case whereas `isAnyAdd` only checks for `ISD::ADD` or `ISD::PTRADD`). I'll try that and update the PR.
Ultimately, it would probably be nice to select offsets for the different addressing mode variants more consistently, but I don't see that in the scope of this PR.
https://github.com/llvm/llvm-project/pull/145330
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