[llvm-branch-commits] [llvm] [LV] Reduce register usage for scaled reductions (PR #133090)

[Sander de Smalen via llvm-branch-commits]

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@@ -5039,10 +5039,25 @@ calculateRegisterUsage(VPlan &Plan, ArrayRef<ElementCount> VFs,
             // even in the scalar case.
             RegUsage[ClassID] += 1;
           } else {
+            // The output from scaled phis and scaled reductions actually have
+            // fewer lanes than the VF.
+            ElementCount VF = VFs[J];
+            if (auto *ReductionR = dyn_cast<VPReductionPHIRecipe>(R))
+              VF = VF.divideCoefficientBy(ReductionR->getVFScaleFactor());
+            else if (auto *PartialReductionR =
+                         dyn_cast<VPPartialReductionRecipe>(R))
+              VF = VF.divideCoefficientBy(PartialReductionR->getVFScaleFactor());
+
+            LLVM_DEBUG(if (VF != VFs[J]) {
+              dbgs() << "LV(REG): Scaled down VF from " << VFs[J] << " to "
+                     << VF << " for ";
+              R->dump();
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sdesmalen-arm wrote:

minor nit: Is it worth creating a `operator<<` for VPDef, so that you can write:
```suggestion
                     << VF << " for " << *R << "\n";
```
?

https://github.com/llvm/llvm-project/pull/133090