[llvm-branch-commits] [llvm] [LV] Reduce register usage for scaled reductions (PR #133090)
David Sherwood via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Apr 7 08:34:29 PDT 2025
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@@ -45,9 +45,9 @@ define void @load_and_compare_only_used_by_assume(ptr %a, ptr noalias %b) {
; CHECK-LABEL: LV: Checking a loop in 'load_and_compare_only_used_by_assume'
; CHECK: LV(REG): VF = vscale x 4
; CHECK-NEXT: LV(REG): Found max usage: 2 item
-; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers
-; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 1 registers
-; CHECK-NEXT: LV(REG): Found invariant usage: 0 item
+; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 3 registers
+; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 2 registers
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david-arm wrote:
Do you know why this has changed? It doesn't look like a partial reduction.
https://github.com/llvm/llvm-project/pull/133090
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