[llvm-branch-commits] [llvm] release/19.x: [LLVM] [MC] Update frame layout & CFI generation to handle frames larger than 2gb (#99263) (PR #100195)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Jul 23 13:24:19 PDT 2024
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/100195
Backport ca076f7a63f6a80e2e38315ec462be354b196b8d
Requested by: @MaskRay
>From 772a44ca77676be636cd7027c8703e8467bc38ad Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Tue, 23 Jul 2024 11:43:30 -0500
Subject: [PATCH] [LLVM] [MC] Update frame layout & CFI generation to handle
frames larger than 2gb (#99263)
Rebase of #84114. I've only included the core changes to frame layout
calculation & CFI generation which sidesteps the regressions found after
merging #84114. Since these changes are a necessary precursor to the
overall fix and are themselves slightly beneficial as CFI is now
generated correctly, I think it is reasonable to merge this first step.
---
For very large stack frames, the offset from the stack pointer to a
local can be more than 2^31 which overflows various `int` offsets in the
frame lowering code.
This patch updates the frame lowering code to calculate the offsets as
64-bit values and fixes CFI to use the corrected sizes.
After this patch, additional work is needed to fix offset truncations in
each target's codegen.
(cherry picked from commit ca076f7a63f6a80e2e38315ec462be354b196b8d)
---
llvm/include/llvm/CodeGen/MachineFrameInfo.h | 14 +++---
.../llvm/CodeGen/TargetFrameLowering.h | 4 +-
llvm/include/llvm/MC/MCAsmBackend.h | 2 +-
llvm/include/llvm/MC/MCDwarf.h | 44 +++++++++----------
llvm/lib/CodeGen/CFIInstrInserter.cpp | 10 ++---
llvm/lib/CodeGen/MachineFrameInfo.cpp | 2 +-
llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 +-
llvm/lib/MC/MCDwarf.cpp | 6 +--
.../MCTargetDesc/AArch64AsmBackend.cpp | 8 ++--
llvm/lib/Target/ARM/ARMFrameLowering.cpp | 4 +-
.../Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 2 +-
.../ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 2 +-
.../Target/Hexagon/HexagonFrameLowering.cpp | 4 +-
.../lib/Target/MSP430/MSP430FrameLowering.cpp | 2 +-
.../Target/X86/MCTargetDesc/X86AsmBackend.cpp | 12 ++---
llvm/lib/Target/X86/X86FrameLowering.cpp | 4 +-
llvm/test/CodeGen/PowerPC/huge-frame-size.ll | 2 +-
llvm/test/CodeGen/RISCV/pr88365.ll | 2 +-
llvm/test/CodeGen/X86/huge-stack.ll | 2 +-
19 files changed, 65 insertions(+), 65 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
index 466fed7fb3a29..213b7ec6b3fbf 100644
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -251,7 +251,7 @@ class MachineFrameInfo {
/// targets, this value is only used when generating debug info (via
/// TargetRegisterInfo::getFrameIndexReference); when generating code, the
/// corresponding adjustments are performed directly.
- int OffsetAdjustment = 0;
+ int64_t OffsetAdjustment = 0;
/// The prolog/epilog code inserter may process objects that require greater
/// alignment than the default alignment the target provides.
@@ -280,7 +280,7 @@ class MachineFrameInfo {
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
- unsigned MaxCallFrameSize = ~0u;
+ uint64_t MaxCallFrameSize = ~UINT64_C(0);
/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
@@ -593,10 +593,10 @@ class MachineFrameInfo {
uint64_t estimateStackSize(const MachineFunction &MF) const;
/// Return the correction for frame offsets.
- int getOffsetAdjustment() const { return OffsetAdjustment; }
+ int64_t getOffsetAdjustment() const { return OffsetAdjustment; }
/// Set the correction for frame offsets.
- void setOffsetAdjustment(int Adj) { OffsetAdjustment = Adj; }
+ void setOffsetAdjustment(int64_t Adj) { OffsetAdjustment = Adj; }
/// Return the alignment in bytes that this function must be aligned to,
/// which is greater than the default stack alignment provided by the target.
@@ -663,7 +663,7 @@ class MachineFrameInfo {
/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
/// then only during or after prolog/epilog code insertion.
///
- unsigned getMaxCallFrameSize() const {
+ uint64_t getMaxCallFrameSize() const {
// TODO: Enable this assert when targets are fixed.
//assert(isMaxCallFrameSizeComputed() && "MaxCallFrameSize not computed yet");
if (!isMaxCallFrameSizeComputed())
@@ -671,9 +671,9 @@ class MachineFrameInfo {
return MaxCallFrameSize;
}
bool isMaxCallFrameSizeComputed() const {
- return MaxCallFrameSize != ~0u;
+ return MaxCallFrameSize != ~UINT64_C(0);
}
- void setMaxCallFrameSize(unsigned S) { MaxCallFrameSize = S; }
+ void setMaxCallFrameSize(uint64_t S) { MaxCallFrameSize = S; }
/// Returns how many bytes of callee-saved registers the target pushed in the
/// prologue. Only used for debug info.
diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
index 0b9cacecc7cbe..72978b2f746d7 100644
--- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
@@ -51,7 +51,7 @@ class TargetFrameLowering {
// Maps a callee saved register to a stack slot with a fixed offset.
struct SpillSlot {
unsigned Reg;
- int Offset; // Offset relative to stack pointer on function entry.
+ int64_t Offset; // Offset relative to stack pointer on function entry.
};
struct DwarfFrameBase {
@@ -66,7 +66,7 @@ class TargetFrameLowering {
// Used with FrameBaseKind::Register.
unsigned Reg;
// Used with FrameBaseKind::CFA.
- int Offset;
+ int64_t Offset;
struct WasmFrameBase WasmLoc;
} Location;
};
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index 736f44686689b..d1d1814dd8b52 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -225,7 +225,7 @@ class MCAsmBackend {
virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}
/// Generate the compact unwind encoding for the CFI instructions.
- virtual uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ virtual uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const {
return 0;
}
diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index d0e45ab59a92e..7dba67efa22fa 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -509,11 +509,11 @@ class MCCFIInstruction {
union {
struct {
unsigned Register;
- int Offset;
+ int64_t Offset;
} RI;
struct {
unsigned Register;
- int Offset;
+ int64_t Offset;
unsigned AddressSpace;
} RIA;
struct {
@@ -527,7 +527,7 @@ class MCCFIInstruction {
std::vector<char> Values;
std::string Comment;
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, SMLoc Loc,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, SMLoc Loc,
StringRef V = "", StringRef Comment = "")
: Label(L), Operation(Op), Loc(Loc), Values(V.begin(), V.end()),
Comment(Comment) {
@@ -539,7 +539,7 @@ class MCCFIInstruction {
assert(Op == OpRegister);
U.RR = {R1, R2};
}
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, unsigned AS,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, unsigned AS,
SMLoc Loc)
: Label(L), Operation(Op), Loc(Loc) {
assert(Op == OpLLVMDefAspaceCfa);
@@ -555,8 +555,8 @@ class MCCFIInstruction {
public:
/// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
- static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset,
- SMLoc Loc = {}) {
+ static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register,
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfa, L, Register, Offset, Loc);
}
@@ -564,13 +564,13 @@ class MCCFIInstruction {
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, Loc);
+ return MCCFIInstruction(OpDefCfaRegister, L, Register, INT64_C(0), Loc);
}
/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
- static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset,
+ static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, Offset, Loc);
}
@@ -578,7 +578,7 @@ class MCCFIInstruction {
/// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
- static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment,
+ static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment,
SMLoc Loc = {}) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, Loc);
}
@@ -588,7 +588,7 @@ class MCCFIInstruction {
/// be the result of evaluating the DWARF operation expression
/// `DW_OP_constu AS; DW_OP_aspace_bregx R, B` as a location description.
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register,
- int Offset,
+ int64_t Offset,
unsigned AddressSpace,
SMLoc Loc) {
return MCCFIInstruction(OpLLVMDefAspaceCfa, L, Register, Offset,
@@ -598,7 +598,7 @@ class MCCFIInstruction {
/// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
- int Offset, SMLoc Loc = {}) {
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpOffset, L, Register, Offset, Loc);
}
@@ -606,7 +606,7 @@ class MCCFIInstruction {
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
- int Offset, SMLoc Loc = {}) {
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpRelOffset, L, Register, Offset, Loc);
}
@@ -619,12 +619,12 @@ class MCCFIInstruction {
/// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpWindowSave, L, 0, 0, Loc);
+ return MCCFIInstruction(OpWindowSave, L, 0, INT64_C(0), Loc);
}
/// .cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpNegateRAState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpNegateRAState, L, 0, INT64_C(0), Loc);
}
/// .cfi_restore says that the rule for Register is now the same as it
@@ -632,31 +632,31 @@ class MCCFIInstruction {
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestore, L, Register, 0, Loc);
+ return MCCFIInstruction(OpRestore, L, Register, INT64_C(0), Loc);
}
/// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpUndefined, L, Register, 0, Loc);
+ return MCCFIInstruction(OpUndefined, L, Register, INT64_C(0), Loc);
}
/// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpSameValue, L, Register, 0, Loc);
+ return MCCFIInstruction(OpSameValue, L, Register, INT64_C(0), Loc);
}
/// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRememberState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpRememberState, L, 0, INT64_C(0), Loc);
}
/// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestoreState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpRestoreState, L, 0, INT64_C(0), Loc);
}
/// .cfi_escape Allows the user to add arbitrary bytes to the unwind
@@ -667,7 +667,7 @@ class MCCFIInstruction {
}
/// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
- static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size,
+ static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int64_t Size,
SMLoc Loc = {}) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, Loc);
}
@@ -702,7 +702,7 @@ class MCCFIInstruction {
return U.RIA.AddressSpace;
}
- int getOffset() const {
+ int64_t getOffset() const {
if (Operation == OpLLVMDefAspaceCfa)
return U.RIA.Offset;
assert(Operation == OpDefCfa || Operation == OpOffset ||
@@ -736,7 +736,7 @@ struct MCDwarfFrameInfo {
unsigned CurrentCfaRegister = 0;
unsigned PersonalityEncoding = 0;
unsigned LsdaEncoding = 0;
- uint32_t CompactUnwindEncoding = 0;
+ uint64_t CompactUnwindEncoding = 0;
bool IsSignalFrame = false;
bool IsSimple = false;
unsigned RAReg = static_cast<unsigned>(INT_MAX);
diff --git a/llvm/lib/CodeGen/CFIInstrInserter.cpp b/llvm/lib/CodeGen/CFIInstrInserter.cpp
index 1ff01ad34b30e..06de92515c044 100644
--- a/llvm/lib/CodeGen/CFIInstrInserter.cpp
+++ b/llvm/lib/CodeGen/CFIInstrInserter.cpp
@@ -68,9 +68,9 @@ class CFIInstrInserter : public MachineFunctionPass {
struct MBBCFAInfo {
MachineBasicBlock *MBB;
/// Value of cfa offset valid at basic block entry.
- int IncomingCFAOffset = -1;
+ int64_t IncomingCFAOffset = -1;
/// Value of cfa offset valid at basic block exit.
- int OutgoingCFAOffset = -1;
+ int64_t OutgoingCFAOffset = -1;
/// Value of cfa register valid at basic block entry.
unsigned IncomingCFARegister = 0;
/// Value of cfa register valid at basic block exit.
@@ -120,7 +120,7 @@ class CFIInstrInserter : public MachineFunctionPass {
/// Return the cfa offset value that should be set at the beginning of a MBB
/// if needed. The negated value is needed when creating CFI instructions that
/// set absolute offset.
- int getCorrectCFAOffset(MachineBasicBlock *MBB) {
+ int64_t getCorrectCFAOffset(MachineBasicBlock *MBB) {
return MBBVector[MBB->getNumber()].IncomingCFAOffset;
}
@@ -175,7 +175,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
// Outgoing cfa offset set by the block.
- int SetOffset = MBBInfo.IncomingCFAOffset;
+ int64_t SetOffset = MBBInfo.IncomingCFAOffset;
// Outgoing cfa register set by the block.
unsigned SetRegister = MBBInfo.IncomingCFARegister;
MachineFunction *MF = MBBInfo.MBB->getParent();
@@ -188,7 +188,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
for (MachineInstr &MI : *MBBInfo.MBB) {
if (MI.isCFIInstruction()) {
std::optional<unsigned> CSRReg;
- std::optional<int> CSROffset;
+ std::optional<int64_t> CSROffset;
unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
const MCCFIInstruction &CFI = Instrs[CFIIndex];
switch (CFI.getOperation()) {
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index 853de4c88caeb..e4b993850f73d 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -197,7 +197,7 @@ void MachineFrameInfo::computeMaxCallFrameSize(
for (MachineInstr &MI : MBB) {
unsigned Opcode = MI.getOpcode();
if (Opcode == FrameSetupOpcode || Opcode == FrameDestroyOpcode) {
- unsigned Size = TII.getFrameSize(MI);
+ uint64_t Size = TII.getFrameSize(MI);
MaxCallFrameSize = std::max(MaxCallFrameSize, Size);
if (FrameSDOps != nullptr)
FrameSDOps->push_back(&MI);
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 3db5e17615fd4..cd5d877e53d82 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -366,8 +366,8 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
return;
// (Re-)Compute the MaxCallFrameSize.
- [[maybe_unused]] uint32_t MaxCFSIn =
- MFI.isMaxCallFrameSizeComputed() ? MFI.getMaxCallFrameSize() : UINT32_MAX;
+ [[maybe_unused]] uint64_t MaxCFSIn =
+ MFI.isMaxCallFrameSizeComputed() ? MFI.getMaxCallFrameSize() : UINT64_MAX;
std::vector<MachineBasicBlock::iterator> FrameSDOps;
MFI.computeMaxCallFrameSize(MF, &FrameSDOps);
assert(MFI.getMaxCallFrameSize() <= MaxCFSIn &&
diff --git a/llvm/lib/MC/MCDwarf.cpp b/llvm/lib/MC/MCDwarf.cpp
index efafd555c5c5c..1297dc3828b58 100644
--- a/llvm/lib/MC/MCDwarf.cpp
+++ b/llvm/lib/MC/MCDwarf.cpp
@@ -1299,8 +1299,8 @@ static void EmitPersonality(MCStreamer &streamer, const MCSymbol &symbol,
namespace {
class FrameEmitterImpl {
- int CFAOffset = 0;
- int InitialCFAOffset = 0;
+ int64_t CFAOffset = 0;
+ int64_t InitialCFAOffset = 0;
bool IsEH;
MCObjectStreamer &Streamer;
@@ -1414,7 +1414,7 @@ void FrameEmitterImpl::emitCFIInstruction(const MCCFIInstruction &Instr) {
if (!IsEH)
Reg = MRI->getDwarfRegNumFromDwarfEHRegNum(Reg);
- int Offset = Instr.getOffset();
+ int64_t Offset = Instr.getOffset();
if (IsRelative)
Offset -= CFAOffset;
Offset = Offset / dataAlignmentFactor;
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index be470c71ae8b6..be34a649e1c4b 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -599,7 +599,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
}
/// Generate the compact unwind encoding from the CFI directives.
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override {
ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
if (Instrs.empty())
@@ -609,10 +609,10 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
return CU::UNWIND_ARM64_MODE_DWARF;
bool HasFP = false;
- unsigned StackSize = 0;
+ uint64_t StackSize = 0;
- uint32_t CompactUnwindEncoding = 0;
- int CurOffset = 0;
+ uint64_t CompactUnwindEncoding = 0;
+ int64_t CurOffset = 0;
for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
const MCCFIInstruction &Inst = Instrs[i];
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 62d01b9f7e90b..40354f9955989 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1166,7 +1166,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if (STI.splitFramePushPop(MF)) {
unsigned DwarfReg = MRI->getDwarfRegNum(
Reg == ARM::R12 ? ARM::RA_AUTH_CODE : Reg, true);
- unsigned Offset = MFI.getObjectOffset(FI);
+ int64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
@@ -1188,7 +1188,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if ((Reg >= ARM::D0 && Reg <= ARM::D31) &&
(Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) {
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
- unsigned Offset = MFI.getObjectOffset(FI);
+ int64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index eb55a2b5e70b8..994b43f1abb49 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -1146,7 +1146,7 @@ enum CompactUnwindEncodings {
/// instructions. If the CFI instructions describe a frame that cannot be
/// encoded in compact unwind, the method returns UNWIND_ARM_MODE_DWARF which
/// tells the runtime to fallback and unwind using dwarf.
-uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
+uint64_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
const MCDwarfFrameInfo *FI, const MCContext *Ctxt) const {
DEBUG_WITH_TYPE("compact-unwind", llvm::dbgs() << "generateCU()\n");
// Only armv7k uses CFI based unwinding.
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
index ac0c9b101cae1..9c958003ca756 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
@@ -34,7 +34,7 @@ class ARMAsmBackendDarwin : public ARMAsmBackend {
/*Is64Bit=*/false, cantFail(MachO::getCPUType(TT)), Subtype);
}
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override;
};
} // end namespace llvm
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index 6ca18528591af..05357de40e3a9 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1659,7 +1659,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
using SpillSlot = TargetFrameLowering::SpillSlot;
unsigned NumFixed;
- int MinOffset = 0; // CS offsets are negative.
+ int64_t MinOffset = 0; // CS offsets are negative.
const SpillSlot *FixedSlots = getCalleeSavedSpillSlots(NumFixed);
for (const SpillSlot *S = FixedSlots; S != FixedSlots+NumFixed; ++S) {
if (!SRegs[S->Reg])
@@ -1678,7 +1678,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
Register R = x;
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(R);
unsigned Size = TRI->getSpillSize(*RC);
- int Off = MinOffset - Size;
+ int64_t Off = MinOffset - Size;
Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign());
Off &= -Alignment.value();
int FI = MFI.CreateFixedSpillStackObject(Size, Off);
diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
index f4d703ebeeab2..d0dc6dd146efd 100644
--- a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
+++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
@@ -293,7 +293,7 @@ void MSP430FrameLowering::emitEpilogue(MachineFunction &MF,
if (!hasFP(MF)) {
MBBI = FirstCSPop;
- int64_t Offset = -CSSize - 2;
+ int64_t Offset = -(int64_t)CSSize - 2;
// Mark callee-saved pop instruction.
// Define the current CFA rule to use the provided offset.
while (MBBI != MBB.end()) {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index a3ef11b2cab45..fcc61d0a5e2f6 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1312,7 +1312,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
/// Implementation of algorithm to generate the compact unwind encoding
/// for the CFI instructions.
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override {
ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
if (Instrs.empty()) return 0;
@@ -1327,13 +1327,13 @@ class DarwinX86AsmBackend : public X86AsmBackend {
bool HasFP = false;
// Encode that we are using EBP/RBP as the frame pointer.
- uint32_t CompactUnwindEncoding = 0;
+ uint64_t CompactUnwindEncoding = 0;
unsigned SubtractInstrIdx = Is64Bit ? 3 : 2;
unsigned InstrOffset = 0;
unsigned StackAdjust = 0;
- unsigned StackSize = 0;
- int MinAbsOffset = std::numeric_limits<int>::max();
+ uint64_t StackSize = 0;
+ int64_t MinAbsOffset = std::numeric_limits<int64_t>::max();
for (const MCCFIInstruction &Inst : Instrs) {
switch (Inst.getOperation()) {
@@ -1360,7 +1360,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
memset(SavedRegs, 0, sizeof(SavedRegs));
StackAdjust = 0;
SavedRegIdx = 0;
- MinAbsOffset = std::numeric_limits<int>::max();
+ MinAbsOffset = std::numeric_limits<int64_t>::max();
InstrOffset += MoveInstrSize;
break;
}
@@ -1403,7 +1403,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
unsigned Reg = *MRI.getLLVMRegNum(Inst.getRegister(), true);
SavedRegs[SavedRegIdx++] = Reg;
StackAdjust += OffsetSize;
- MinAbsOffset = std::min(MinAbsOffset, abs(Inst.getOffset()));
+ MinAbsOffset = std::min(MinAbsOffset, std::abs(Inst.getOffset()));
InstrOffset += PushInstrSize(Reg);
break;
}
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 0ff50d8ef678e..bdc9a0d29670a 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -473,7 +473,7 @@ void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(
: FramePtr;
unsigned DwarfReg = MRI->getDwarfRegNum(MachineFramePtr, true);
// Offset = space for return address + size of the frame pointer itself.
- unsigned Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
+ int64_t Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
BuildCFI(MBB, MBBI, DebugLoc{},
MCCFIInstruction::createOffset(nullptr, DwarfReg, -Offset));
emitCalleeSavedFrameMoves(MBB, MBBI, DebugLoc{}, true);
@@ -2553,7 +2553,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (!HasFP && NeedsDwarfCFI) {
MBBI = FirstCSPop;
- int64_t Offset = -CSSize - SlotSize;
+ int64_t Offset = -(int64_t)CSSize - SlotSize;
// Mark callee-saved pop instruction.
// Define the current CFA rule to use the provided offset.
while (MBBI != MBB.end()) {
diff --git a/llvm/test/CodeGen/PowerPC/huge-frame-size.ll b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
index f1039df6f549a..78bdac021ac8a 100644
--- a/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
+++ b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
@@ -18,7 +18,7 @@ define void @foo(i8 %x) {
; CHECK-LE-NEXT: oris 0, 0, 65535
; CHECK-LE-NEXT: ori 0, 0, 65504
; CHECK-LE-NEXT: stdux 1, 1, 0
-; CHECK-LE-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-NEXT: .cfi_def_cfa_offset 4294967328
; CHECK-LE-NEXT: li 4, 1
; CHECK-LE-NEXT: addi 5, 1, 32
; CHECK-LE-NEXT: stb 3, 32(1)
diff --git a/llvm/test/CodeGen/RISCV/pr88365.ll b/llvm/test/CodeGen/RISCV/pr88365.ll
index 73010fdf40447..4e4dead98ee69 100644
--- a/llvm/test/CodeGen/RISCV/pr88365.ll
+++ b/llvm/test/CodeGen/RISCV/pr88365.ll
@@ -10,7 +10,7 @@ define void @foo() {
; CHECK-NEXT: .cfi_offset ra, -4
; CHECK-NEXT: li a0, -2048
; CHECK-NEXT: sub sp, sp, a0
-; CHECK-NEXT: .cfi_def_cfa_offset -16
+; CHECK-NEXT: .cfi_def_cfa_offset 4294967280
; CHECK-NEXT: addi a0, sp, 4
; CHECK-NEXT: call use
; CHECK-NEXT: li a0, -2048
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
index a7ceb4a4ee6fe..920033ba1182c 100644
--- a/llvm/test/CodeGen/X86/huge-stack.ll
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -7,7 +7,7 @@ define void @foo() unnamed_addr #0 {
; CHECK: # %bb.0:
; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
; CHECK-NEXT: subq %rax, %rsp
-; CHECK-NEXT: .cfi_def_cfa_offset -122
+; CHECK-NEXT: .cfi_def_cfa_offset 8589934470
; CHECK-NEXT: movb $42, -129(%rsp)
; CHECK-NEXT: movb $43, -128(%rsp)
; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
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