[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

[Matt Arsenault via llvm-branch-commits]

arsenm wrote:

> > I still think it is terribly surprising all of the test diff shows up in this commit, and not the selection case
> 
> Because the selection support is done in the next PR of the review stack, #96162. This patch takes care of choosing the right opcode while merging the loads.

It's more the lack of vectorization of these loads in the IR that's surprising. Ideally we wouldn't have to rely on any of this post-isel load merging 

https://github.com/llvm/llvm-project/pull/96162