[llvm-branch-commits] [lldb][Process] Introduce LoongArch64 hw break/watchpoint support (PR #118770)

[David Spickett via llvm-branch-commits]

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@@ -0,0 +1,34 @@
+//===-- NativeRegisterContextDBReg_loongarch.h ------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef lldb_NativeRegisterContextDBReg_loongarch_h
+#define lldb_NativeRegisterContextDBReg_loongarch_h
+
+#include "Plugins/Process/Utility/NativeRegisterContextDBReg.h"
+
+namespace lldb_private {
+
+class NativeRegisterContextDBReg_loongarch : public NativeRegisterContextDBReg {
+public:
+  explicit NativeRegisterContextDBReg_loongarch(uint32_t enable_bit)
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DavidSpickett wrote:

Actually I'm not sure how to do that with these stacked branches, and I see that in the arm64 code you already pass the value in this way.

So I likely have mixed up something here.

So if you notice that you're repeating the enable bit value multiple times, try to mitigate that. But otherwise, I'm fine with how it is.

https://github.com/llvm/llvm-project/pull/118770