[llvm-branch-commits] [llvm] 5557274 - [RISCV] Test for bug-88799

[via llvm-branch-commits]

Author: AdityaK
Date: 2024-04-15T15:18:05-07:00
New Revision: 555727461739dd9a9cf975e70767f5e3ca95f340

URL: https://github.com/llvm/llvm-project/commit/555727461739dd9a9cf975e70767f5e3ca95f340
DIFF: https://github.com/llvm/llvm-project/commit/555727461739dd9a9cf975e70767f5e3ca95f340.diff

LOG: [RISCV] Test for bug-88799

Added: 
    llvm/test/CodeGen/RISCV/bug-88799-scalable-memory-type.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/bug-88799-scalable-memory-type.ll b/llvm/test/CodeGen/RISCV/bug-88799-scalable-memory-type.ll
new file mode 100644
index 00000000000000..e732db414bd472
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/bug-88799-scalable-memory-type.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc < %s | FileCheck %s -check-prefix=RV64I
+
+target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
+target triple = "riscv64-unknown-linux-gnu"
+
+; Function Attrs: vscale_range(2,2)
+define i32 @main() #0 {
+; RV64I-LABEL: main:
+; RV64I:       # %bb.0: # %vector.body
+; RV64I-NEXT:    lui a0, 1040368
+; RV64I-NEXT:    addiw a0, a0, -144
+; RV64I-NEXT:    vl2re16.v v8, (a0)
+; RV64I-NEXT:    vl2re16.v v10, (a0)
+; RV64I-NEXT:    vs2r.v v8, (zero)
+; RV64I-NEXT:    vs2r.v v10, (zero)
+; RV64I-NEXT:    li a0, 0
+; RV64I-NEXT:    ret
+vector.body:
+  %0 = load <16 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
+  store <16 x i16> %0, ptr null, align 2
+  %wide.load = load <vscale x 8 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
+  store <vscale x 8 x i16> %wide.load, ptr null, align 2
+  ret i32 0
+}
+
+attributes #0 = { vscale_range(2,2) "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }
+