[llvm-branch-commits] [lld] [llvm] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/84598

>From 7c9298eea6d8239f9afedc3d6aabb1ec0f71e273 Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Mon, 11 Mar 2024 15:35:59 -0700
Subject: [PATCH 1/3] Update callsite parameter

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index b2e0ba17e4efe5..5eb2ce3d64513a 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1228,8 +1228,8 @@ mergeAttributesSection(const SmallVector<InputSectionBase *, 0> &sections) {
           if (r.second) {
             firstX3RegUse = sec;
           } else {
-            mergeX3RegUse(merged.intAttr, firstX3RegUse, sec,
-                          r.first->getSecond(), *i);
+            mergeX3RegUse(r.first, firstX3RegUse, sec, r.first->getSecond(),
+                          *i);
           }
         }
         continue;

>From c39aca073491f06127eadd8c69cc15e23ea4bc2d Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Fri, 22 Mar 2024 12:44:27 -0700
Subject: [PATCH 2/3] Fix typos

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 09db69286c5e9a..173afce454f382 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1139,8 +1139,8 @@ static void mergeX3RegUse(DenseMap<unsigned, unsigned>::iterator it,
                           const InputSectionBase *oldSection,
                           const InputSectionBase *newSection,
                           unsigned int oldTag, unsigned int newTag) {
-  // X3/GP register usage ar incompatible and cannot be merged, with the
-  // exception of the UNKNOWN or 0 value
+  // X3/GP register usage are incompatible and cannot be merged, with the
+  // exception of the UNKNOWN or 0 value.
   using RISCVAttrs::RISCVX3RegUse::X3RegUsage;
   if (newTag == X3RegUsage::UNKNOWN)
     return;

>From 86bb4a866953c886e586f61da0ec74c9e1129cfa Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Fri, 29 Mar 2024 16:15:38 -0700
Subject: [PATCH 3/3] Fix windows test failure

Created using spr 1.3.4
---
 llvm/test/CodeGen/RISCV/attributes.ll | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
index eecab162eb31c8..9bd730003f0e72 100644
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -519,7 +519,6 @@
 ; X3SCS: .attribute 16, 2
 ; X3TMP: .attribute 16, 3
 ; X3ERR: LLVM ERROR: Cannot set multiple ABIs for X3/GP
-; X3ERR: error: Aborted
 
 define i32 @addi(i32 %a) {
   %1 = add i32 %a, 1