[llvm-branch-commits] [llvm] 2476576 - Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region bou…"
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Apr 4 13:26:02 PDT 2024
Author: Victor Campos
Date: 2024-04-04T21:26:00+01:00
New Revision: 2476576ce2c5f74eb9252f5016d86adb3a3be9d3
URL: https://github.com/llvm/llvm-project/commit/2476576ce2c5f74eb9252f5016d86adb3a3be9d3
DIFF: https://github.com/llvm/llvm-project/commit/2476576ce2c5f74eb9252f5016d86adb3a3be9d3.diff
LOG: Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region bou…"
This reverts commit 5ad320abe36357e3290007d3ab353e8637f33720.
Added:
Modified:
llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
llvm/lib/Target/ARM/Thumb2InstrInfo.h
Removed:
llvm/test/CodeGen/ARM/misched-branch-targets.mir
################################################################################
diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
index fc2834cb0b45c7..083f25f49dec45 100644
--- a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -286,25 +286,6 @@ MachineInstr *Thumb2InstrInfo::commuteInstructionImpl(MachineInstr &MI,
return ARMBaseInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
}
-bool Thumb2InstrInfo::isSchedulingBoundary(const MachineInstr &MI,
- const MachineBasicBlock *MBB,
- const MachineFunction &MF) const {
- // BTI clearing instructions shall not take part in scheduling regions as
- // they must stay in their intended place. Although PAC isn't BTI clearing,
- // it can be transformed into PACBTI after the pre-RA Machine Scheduling
- // has taken place, so its movement must also be restricted.
- switch (MI.getOpcode()) {
- case ARM::t2BTI:
- case ARM::t2PAC:
- case ARM::t2PACBTI:
- case ARM::t2SG:
- return true;
- default:
- break;
- }
- return ARMBaseInstrInfo::isSchedulingBoundary(MI, MBB, MF);
-}
-
void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI,
const DebugLoc &dl, Register DestReg,
diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.h b/llvm/lib/Target/ARM/Thumb2InstrInfo.h
index 8915da8c5bf3c8..4bb412f09dcbeb 100644
--- a/llvm/lib/Target/ARM/Thumb2InstrInfo.h
+++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.h
@@ -68,10 +68,6 @@ class Thumb2InstrInfo : public ARMBaseInstrInfo {
unsigned OpIdx1,
unsigned OpIdx2) const override;
- bool isSchedulingBoundary(const MachineInstr &MI,
- const MachineBasicBlock *MBB,
- const MachineFunction &MF) const override;
-
private:
void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
};
diff --git a/llvm/test/CodeGen/ARM/misched-branch-targets.mir b/llvm/test/CodeGen/ARM/misched-branch-targets.mir
deleted file mode 100644
index b071fbd4538a6d..00000000000000
--- a/llvm/test/CodeGen/ARM/misched-branch-targets.mir
+++ /dev/null
@@ -1,166 +0,0 @@
-# RUN: llc -o - -run-pass=machine-scheduler -misched=shuffle %s | FileCheck %s
-# RUN: llc -o - -run-pass=postmisched %s | FileCheck %s
-
---- |
- target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- target triple = "thumbv8.1m.main-arm-none-eabi"
-
- define i32 @foo_bti() #0 {
- entry:
- ret i32 0
- }
-
- define i32 @foo_pac() #0 {
- entry:
- ret i32 0
- }
-
- define i32 @foo_pacbti() #0 {
- entry:
- ret i32 0
- }
-
- define i32 @foo_setjmp() #0 {
- entry:
- ret i32 0
- if.then:
- ret i32 0
- }
-
- define i32 @foo_sg() #0 {
- entry:
- ret i32 0
- }
-
- declare i32 @setjmp(ptr noundef) #1
- declare void @longjmp(ptr noundef, i32 noundef) #2
-
- attributes #0 = { "frame-pointer"="all" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main" }
- attributes #1 = { nounwind returns_twice "frame-pointer"="all" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main" }
- attributes #2 = { noreturn nounwind "frame-pointer"="all" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main" }
-
-...
----
-name: foo_bti
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- liveins: $r0
-
- t2BTI
- renamable $r0, dead $cpsr = nsw tADDi8 killed renamable $r0, 1, 14 /* CC::al */, $noreg
- tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
-
-...
-
-# CHECK-LABEL: name: foo_bti
-# CHECK: body:
-# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: liveins: $r0
-# CHECK-NEXT: {{^ +$}}
-# CHECK-NEXT: t2BTI
-
----
-name: foo_pac
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- liveins: $r0, $lr, $r12
-
- frame-setup t2PAC implicit-def $r12, implicit $lr, implicit $sp
- renamable $r2 = nsw t2ADDri $r0, 3, 14 /* CC::al */, $noreg, $noreg
- $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
- $r7 = frame-setup tMOVr killed $sp, 14 /* CC::al */, $noreg
- early-clobber $sp = frame-setup t2STR_PRE killed $r12, $sp, -4, 14 /* CC::al */, $noreg
- $r12, $sp = frame-destroy t2LDR_POST $sp, 4, 14 /* CC::al */, $noreg
- $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
- t2AUT implicit $r12, implicit $lr, implicit $sp
- tBX_RET 14 /* CC::al */, $noreg, implicit $r0
-
-...
-
-# CHECK-LABEL: name: foo_pac
-# CHECK: body:
-# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: liveins: $r0, $lr, $r12
-# CHECK-NEXT: {{^ +$}}
-# CHECK-NEXT: frame-setup t2PAC implicit-def $r12, implicit $lr, implicit $sp
-
----
-name: foo_pacbti
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- liveins: $r0, $lr, $r12
-
- frame-setup t2PACBTI implicit-def $r12, implicit $lr, implicit $sp
- renamable $r2 = nsw t2ADDri $r0, 3, 14 /* CC::al */, $noreg, $noreg
- $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
- $r7 = frame-setup tMOVr killed $sp, 14 /* CC::al */, $noreg
- early-clobber $sp = frame-setup t2STR_PRE killed $r12, $sp, -4, 14 /* CC::al */, $noreg
- $r12, $sp = frame-destroy t2LDR_POST $sp, 4, 14 /* CC::al */, $noreg
- $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
- t2AUT implicit $r12, implicit $lr, implicit $sp
- tBX_RET 14 /* CC::al */, $noreg, implicit $r0
-
-...
-
-# CHECK-LABEL: name: foo_pacbti
-# CHECK: body:
-# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: liveins: $r0, $lr, $r12
-# CHECK-NEXT: {{^ +$}}
-# CHECK-NEXT: frame-setup t2PACBTI implicit-def $r12, implicit $lr, implicit $sp
-
----
-name: foo_setjmp
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- successors: %bb.1
- liveins: $lr
-
- frame-setup tPUSH 14 /* CC::al */, $noreg, $r7, killed $lr, implicit-def $sp, implicit $sp
- $r7 = frame-setup tMOVr $sp, 14 /* CC::al */, $noreg
- $sp = frame-setup tSUBspi $sp, 40, 14 /* CC::al */, $noreg
- renamable $r0 = tMOVr $sp, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @setjmp, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0
- t2BTI
- renamable $r2 = nsw t2ADDri $r0, 3, 14 /* CC::al */, $noreg, $noreg
- tCMPi8 killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
- t2IT 0, 2, implicit-def $itstate
- renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit $itstate
- $sp = frame-destroy tADDspi $sp, 40, 0 /* CC::eq */, $cpsr, implicit $itstate
- frame-destroy tPOP_RET 0 /* CC::eq */, killed $cpsr, def $r7, def $pc, implicit killed $r0, implicit $sp, implicit killed $itstate
-
- bb.1.if.then:
- renamable $r0 = tMOVr $sp, 14 /* CC::al */, $noreg
- renamable $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @longjmp, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp
-
-...
-
-# CHECK-LABEL: name: foo_setjmp
-# CHECK: body:
-# CHECK: tBL 14 /* CC::al */, $noreg, @setjmp, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0
-# CHECK-NEXT: t2BTI
-
----
-name: foo_sg
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- liveins: $r0
-
- t2SG 14 /* CC::al */, $noreg
- renamable $r0, dead $cpsr = nsw tADDi8 killed renamable $r0, 1, 14 /* CC::al */, $noreg
- tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
-
-...
-
-# CHECK-LABEL: name: foo_sg
-# CHECK: body:
-# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: liveins: $r0
-# CHECK-NEXT: {{^ +$}}
-# CHECK-NEXT: t2SG
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