[llvm-branch-commits] [llvm] 77ff99c - [ValueTracking] Fix CannotBeOrderedLessThanZero() for fdiv (PR58046)

Tobias Hieta via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Sep 29 23:20:55 PDT 2022


Author: Nikita Popov
Date: 2022-09-30T08:20:33+02:00
New Revision: 77ff99c10bee11a202dbe5fd1a08d8394d7828af

URL: https://github.com/llvm/llvm-project/commit/77ff99c10bee11a202dbe5fd1a08d8394d7828af
DIFF: https://github.com/llvm/llvm-project/commit/77ff99c10bee11a202dbe5fd1a08d8394d7828af.diff

LOG: [ValueTracking] Fix CannotBeOrderedLessThanZero() for fdiv (PR58046)

When checking the RHS of fdiv, we should set the SignBitOnly flag,
because a negative zero can become -Inf, which is ordered less
than zero.

Fixes https://github.com/llvm/llvm-project/issues/58046.

Differential Revision: https://reviews.llvm.org/D134876

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Transforms/InstSimplify/floating-point-compare.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 2dd671b4ab9e3..569ee6b3ea86c 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -3593,14 +3593,23 @@ static bool cannotBeOrderedLessThanZeroImpl(const Value *V,
   // Unsigned integers are always nonnegative.
   case Instruction::UIToFP:
     return true;
-  case Instruction::FMul:
   case Instruction::FDiv:
-    // X * X is always non-negative or a NaN.
     // X / X is always exactly 1.0 or a NaN.
     if (I->getOperand(0) == I->getOperand(1) &&
         (!SignBitOnly || cast<FPMathOperator>(I)->hasNoNaNs()))
       return true;
 
+    // Set SignBitOnly for RHS, because X / -0.0 is -Inf (or NaN).
+    return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), TLI, SignBitOnly,
+                                           Depth + 1) &&
+           cannotBeOrderedLessThanZeroImpl(I->getOperand(1), TLI,
+                                           /*SignBitOnly*/ true, Depth + 1);
+  case Instruction::FMul:
+    // X * X is always non-negative or a NaN.
+    if (I->getOperand(0) == I->getOperand(1) &&
+        (!SignBitOnly || cast<FPMathOperator>(I)->hasNoNaNs()))
+      return true;
+
     LLVM_FALLTHROUGH;
   case Instruction::FAdd:
   case Instruction::FRem:

diff  --git a/llvm/test/Transforms/InstSimplify/floating-point-compare.ll b/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
index 399950b65de2f..a32717aed2368 100644
--- a/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
+++ b/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
@@ -999,10 +999,14 @@ define <2 x i1> @known_positive_une_with_negative_constant_splat_vec(<2 x i32> %
   ret <2 x i1> %cmp
 }
 
-; FIXME: Miscompile.
+; TODO: This could fold to true.
 define i1 @pr58046(i64 %arg) {
 ; CHECK-LABEL: @pr58046(
-; CHECK-NEXT:    ret i1 false
+; CHECK-NEXT:    [[FP:%.*]] = uitofp i64 [[ARG:%.*]] to double
+; CHECK-NEXT:    [[MUL:%.*]] = fmul double -0.000000e+00, [[FP]]
+; CHECK-NEXT:    [[DIV:%.*]] = fdiv double 1.000000e+00, [[MUL]]
+; CHECK-NEXT:    [[CMP:%.*]] = fcmp oeq double [[DIV]], 0xFFF0000000000000
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %fp = uitofp i64 %arg to double
   %mul = fmul double -0.000000e+00, %fp


        


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