[llvm-branch-commits] [llvm] a5b57bd - Kai's GISEL Patch 2

[Amy Kwan via llvm-branch-commits]

Author: Amy Kwan
Date: 2022-08-30T15:04:50-05:00
New Revision: a5b57bde75e757dbf9769ad6c679b2be1c8ca8b6

URL: https://github.com/llvm/llvm-project/commit/a5b57bde75e757dbf9769ad6c679b2be1c8ca8b6
DIFF: https://github.com/llvm/llvm-project/commit/a5b57bde75e757dbf9769ad6c679b2be1c8ca8b6.diff

LOG: Kai's GISEL Patch 2

Added: 
    llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll

Modified: 
    llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
    llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp b/llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
index be56b6fe49589..bbbd211269d42 100644
--- a/llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
+++ b/llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
@@ -27,5 +27,8 @@ PPCLegalizerInfo::PPCLegalizerInfo(const PPCSubtarget &ST) {
   getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
       .legalFor({S64})
       .clampScalar(0, S64, S64);
+  getActionDefinitionsBuilder({G_ADD, G_SUB})
+      .legalFor({S64})
+      .clampScalar(0, S64, S64);
   getLegacyLegalizerInfo().computeTables();
 }

diff  --git a/llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp b/llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
index 64e6a04daabc1..f1732742438eb 100644
--- a/llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
+++ b/llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
@@ -66,6 +66,9 @@ PPCRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
   unsigned MappingID = DefaultMappingID;
 
   switch (Opc) {
+    // Arithmetic ops.
+  case TargetOpcode::G_ADD:
+  case TargetOpcode::G_SUB:
     // Bitwise ops.
   case TargetOpcode::G_AND:
   case TargetOpcode::G_OR:

diff  --git a/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll b/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll
new file mode 100644
index 0000000000000..41012338e3545
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll
@@ -0,0 +1,65 @@
+; RUN: llc -mtriple ppc64le-linux -global-isel -o - < %s | FileCheck %s -check-prefixes=CHECK,LINUX
+
+; CHECK-LABEL: test_addi8:
+; LINUX: add 3, 3, 4
+; LINUX: blr
+define i8 @test_addi8(i8 %a, i8 %b) {
+  %res = add i8 %a, %b
+  ret i8 %res
+}
+
+; CHECK-LABEL: test_addi16:
+; LINUX: add 3, 3, 4
+; LINUX: blr
+define i16 @test_addi16(i16 %a, i16 %b) {
+  %res = add i16 %a, %b
+  ret i16 %res
+}
+
+; CHECK-LABEL: test_addi32:
+; LINUX: add 3, 3, 4
+; LINUX: blr
+define i32 @test_addi32(i32 %a, i32 %b) {
+  %res = add i32 %a, %b
+  ret i32 %res
+}
+
+; CHECK-LABEL: test_addi64:
+; LINUX: add 3, 3, 4
+; LINUX: blr
+define i64 @test_addi64(i64 %a, i64 %b) {
+  %res = add i64 %a, %b
+  ret i64 %res
+}
+
+; CHECK-LABEL: test_subi8:
+; LINUX: sub 3, 3, 4
+; LINUX: blr
+define i8 @test_subi8(i8 %a, i8 %b) {
+  %res = sub i8 %a, %b
+  ret i8 %res
+}
+
+; CHECK-LABEL: test_subi16:
+; LINUX: sub 3, 3, 4
+; LINUX: blr
+define i16 @test_subi16(i16 %a, i16 %b) {
+  %res = sub i16 %a, %b
+  ret i16 %res
+}
+
+; CHECK-LABEL: test_subi32:
+; LINUX: sub 3, 3, 4
+; LINUX: blr
+define i32 @test_subi32(i32 %a, i32 %b) {
+  %res = sub i32 %a, %b
+  ret i32 %res
+}
+
+; CHECK-LABEL: test_subi64:
+; LINUX: sub 3, 3, 4
+; LINUX: blr
+define i64 @test_subi64(i64 %a, i64 %b) {
+  %res = sub i64 %a, %b
+  ret i64 %res
+}