[llvm-branch-commits] [clang] 7af1432 - Working (ish) version

Albion Fung via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Jul 13 19:57:41 PDT 2021


Author: Albion Fung
Date: 2021-07-13T21:57:27-05:00
New Revision: 7af1432f63a2fe3d8902a5486eba5ba25dd3f509

URL: https://github.com/llvm/llvm-project/commit/7af1432f63a2fe3d8902a5486eba5ba25dd3f509
DIFF: https://github.com/llvm/llvm-project/commit/7af1432f63a2fe3d8902a5486eba5ba25dd3f509.diff

LOG: Working (ish) version

Added: 
    

Modified: 
    clang/lib/CodeGen/CGBuiltin.cpp
    llvm/include/llvm/IR/IntrinsicsPowerPC.td
    llvm/lib/Target/PowerPC/PPCInstr64Bit.td

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 94ebb60fdd19..2dccd17bb8ee 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15575,15 +15575,10 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
   case PPC::BI__builtin_ppc_lwarx:
     return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E);
   case PPC::BI__builtin_ppc_mfspr: {
-    dbgs() <<"Hello\n";
-    llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType();
-    src0->dump();
-    dbgs() << "Ops size: " << Ops.size() << "\n";
-    Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, src0);
-    // uint64_t Imm = cast<llvm::ConstantInt>(Ops[0])->getZExtValue();
-    // Ops[0] = llvm::ConstantInt::get(Int32Ty, Imm);
+    // llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType();
+    dbgs() << "Width: " << Ops[0]->getType()->getPrimitiveSizeInBits() << "\n";
+    Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, Int64Ty);
     Value *temp =  Builder.CreateCall(F, Ops);
-    temp->dump();
     return temp;
   }
   }

diff  --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 2e5600e68f53..c1b421e168a6 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1599,6 +1599,6 @@ let TargetPrefix = "ppc" in {
       : GCCBuiltin<"__builtin_ppc_maddld">,
         Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
 
-  def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty], [ImmArg<ArgIndex<1>>]>;
+  def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
 }
 

diff  --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index a709b496d75e..d245cc596e64 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1748,5 +1748,5 @@ def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
 // trapd
 def : Pat<(int_ppc_trapd g8rc:$A),
           (TDI 24, $A, 0)>;
-def : Pat<(i32 (int_ppc_mfspr i32:$SPR)),
-          (MFSPR $SPR)>;
+def : Pat<(i64 (int_ppc_mfspr i32:$SPR)),
+          (MFSPR8 $SPR)>;


        


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