[llvm-branch-commits] [llvm] bf1f5ca - CET for Exception Handle
Tom Stellard via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon May 18 18:49:24 PDT 2020
Author: Pengfei Wang
Date: 2020-05-18T18:47:27-07:00
New Revision: bf1f5caf20281eb312e1bcb0a9d32bd6a5a2e289
URL: https://github.com/llvm/llvm-project/commit/bf1f5caf20281eb312e1bcb0a9d32bd6a5a2e289
DIFF: https://github.com/llvm/llvm-project/commit/bf1f5caf20281eb312e1bcb0a9d32bd6a5a2e289.diff
LOG: CET for Exception Handle
Summary:
Bug fix for https://bugs.llvm.org/show_bug.cgi?id=45182
Exception handle may indirectly jump to catch pad, So we should add ENDBR instruction before catch pad instructions.
Reviewers: craig.topper, hjl.tools, LuoYuanke, annita.zhang, pengfei
Reviewed By: LuoYuanke
Subscribers: hiraditya, llvm-commits
Patch By: Xiang Zhang (xiangzhangllvm)
Differential Revision: https://reviews.llvm.org/D76190
(cherry picked from commit 974d649f8eaf3026ccb9d1b77bdec55da25366e5)
Added:
llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
Modified:
llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp b/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
index 48d0d8a35704..743df41a00ff 100644
--- a/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
+++ b/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
@@ -127,11 +127,18 @@ bool X86IndirectBranchTrackingPass::runOnMachineFunction(MachineFunction &MF) {
if (MBB.hasAddressTaken())
Changed |= addENDBR(MBB, MBB.begin());
+ // Exception handle may indirectly jump to catch pad, So we should add
+ // ENDBR before catch pad instructions.
+ bool EHPadIBTNeeded = MBB.isEHPad();
+
for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
- if (!I->isCall())
- continue;
- if (IsCallReturnTwice(I->getOperand(0)))
+ if (I->isCall() && IsCallReturnTwice(I->getOperand(0)))
Changed |= addENDBR(MBB, std::next(I));
+
+ if (EHPadIBTNeeded && I->isEHLabel()) {
+ Changed |= addENDBR(MBB, std::next(I));
+ EHPadIBTNeeded = false;
+ }
}
}
return Changed;
diff --git a/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll b/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
new file mode 100644
index 000000000000..c14e82dc8f3d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
@@ -0,0 +1,31 @@
+; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -mtriple=i386-unknown-unknown < %s | FileCheck %s
+
+;There should be 2 endbr* instruction at entry and catch pad.
+;CHECK-COUNT-2: endbr
+
+declare void @_Z20function_that_throwsv()
+declare i32 @__gxx_personality_sj0(...)
+declare i8* @__cxa_begin_catch(i8*)
+declare void @__cxa_end_catch()
+
+define void @test8() personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) {
+entry:
+ invoke void @_Z20function_that_throwsv()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %0 = landingpad { i8*, i32 }
+ catch i8* null
+ %1 = extractvalue { i8*, i32 } %0, 0
+ %2 = tail call i8* @__cxa_begin_catch(i8* %1)
+ tail call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret void
+}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 4, !"cf-protection-branch", i32 1}
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