[llvm-branch-commits] [llvm] 5633f32 - Propagate MIFlags in table gen

[Michael Berg via llvm-branch-commits]

Author: Michael Berg
Date: 2020-05-13T18:25:33-07:00
New Revision: 5633f32102c454edc6f9d333c16ae920a7bac888

URL: https://github.com/llvm/llvm-project/commit/5633f32102c454edc6f9d333c16ae920a7bac888
DIFF: https://github.com/llvm/llvm-project/commit/5633f32102c454edc6f9d333c16ae920a7bac888.diff

LOG: Propagate MIFlags in table gen

Summary: Add flag propagation to tablegen via OutMIs from originating MI in InstructionSelector::executeMatchTable.

Reviewers: dsanders, volkan

Reviewed By: dsanders

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74988

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
    llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
index 9e9e1806bc6f..cb48122047f1 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -57,6 +57,7 @@ bool InstructionSelector::executeMatchTable(
 
   uint64_t CurrentIdx = 0;
   SmallVector<uint64_t, 4> OnFailResumeAt;
+  uint16_t Flags = State.MIs[0]->getFlags();
 
   enum RejectAction { RejectAndGiveUp, RejectAndResume };
   auto handleReject = [&]() -> RejectAction {
@@ -71,6 +72,15 @@ bool InstructionSelector::executeMatchTable(
     return RejectAndResume;
   };
 
+  auto propagateFlags = [&](NewMIVector &OutMIs) {
+    if (Flags == MachineInstr::MIFlag::NoFlags)
+      return false;
+    for (auto MIB : OutMIs)
+      MIB.setMIFlags(Flags);
+
+    return true;
+  };
+
   while (true) {
     assert(CurrentIdx != ~0u && "Invalid MatchTable index");
     int64_t MatcherOpcode = MatchTable[CurrentIdx++];
@@ -1065,6 +1075,7 @@ bool InstructionSelector::executeMatchTable(
     case GIR_Done:
       DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
                       dbgs() << CurrentIdx << ": GIR_Done\n");
+      propagateFlags(OutMIs);
       return true;
 
     default:

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
index 8e1ee344264c..7139c7b8d94d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
@@ -71,12 +71,12 @@ body:             |
   ; CHECK:   BR %18
   ; CHECK: bb.2.sw.bb:
   ; CHECK:   successors: %bb.4(0x80000000)
-  ; CHECK:   [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY]], 42, 0
+  ; CHECK:   [[ADDWri:%[0-9]+]]:gpr32sp = nsw ADDWri [[COPY]], 42, 0
   ; CHECK:   B %bb.4
   ; CHECK: bb.3.sw.bb1:
   ; CHECK:   successors: %bb.4(0x80000000)
   ; CHECK:   [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 3
-  ; CHECK:   [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[MOVi32imm]], $wzr
+  ; CHECK:   [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[COPY]], [[MOVi32imm]], $wzr
   ; CHECK: bb.4.return:
   ; CHECK:   [[PHI:%[0-9]+]]:gpr32 = PHI [[MADDWrrr]], %bb.3, [[ADDWri]], %bb.2, [[COPY1]], %bb.0, [[COPY2]], %bb.1
   ; CHECK:   $w0 = COPY [[PHI]]