[llvm-branch-commits] [llvm] 2cf12ae - [RISCV] Handle Match_InvalidSImm5 in RISCVAsmParser::MatchAndEmitInstruction
Craig Topper via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Dec 14 17:33:00 PST 2020
Author: Craig Topper
Date: 2020-12-14T17:22:55-08:00
New Revision: 2cf12ae0cc3fd51b2708a2ee1f61d9e861ca6b9d
URL: https://github.com/llvm/llvm-project/commit/2cf12ae0cc3fd51b2708a2ee1f61d9e861ca6b9d
DIFF: https://github.com/llvm/llvm-project/commit/2cf12ae0cc3fd51b2708a2ee1f61d9e861ca6b9d.diff
LOG: [RISCV] Handle Match_InvalidSImm5 in RISCVAsmParser::MatchAndEmitInstruction
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 4bb971368e83..fbc67e4c4195 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1040,6 +1040,9 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 4) - 1);
case Match_InvalidUImm5:
return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 5) - 1);
+ case Match_InvalidSImm5:
+ return generateImmOutOfRangeError(Operands, ErrorInfo, -(1 << 4),
+ (1 << 4) - 1);
case Match_InvalidSImm6:
return generateImmOutOfRangeError(Operands, ErrorInfo, -(1 << 5),
(1 << 5) - 1);
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