[llvm-branch-commits] [llvm] ed09d41 - [LSR][X86] Replace -march with -mtriples

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2020-12-02T17:05:15Z
New Revision: ed09d41c8aa11fd8412211c38bc13220ffaf3070

URL: https://github.com/llvm/llvm-project/commit/ed09d41c8aa11fd8412211c38bc13220ffaf3070
DIFF: https://github.com/llvm/llvm-project/commit/ed09d41c8aa11fd8412211c38bc13220ffaf3070.diff

LOG: [LSR][X86] Replace -march with -mtriples

Fixes build on gnux32 hosts

Added: 
    

Modified: 
    llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
    llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
    llvm/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
index 2e32d916fe32..44da8b7f72cf 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -O3 -mtriple=x86_64-- -mcpu=core2 | FileCheck %s
 
 declare i1 @check() nounwind
 declare i1 @foo(i8*, i8*, i8*) nounwind

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
index 7925bf01020e..fc3c875d7e56 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
@@ -1,6 +1,6 @@
 ; REQUIRES: asserts
-; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -O3 -march=x86 -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -O3 -mtriple=x86_64-- -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -O3 -mtriple=i686-- -mcpu=core2 -stress-ivchain | FileCheck %s -check-prefix=X86
 
 ; @sharedidx is an unrolled variant of this loop:
 ;  for (unsigned long i = 0; i < len; i += s) {
@@ -17,14 +17,14 @@
 ; X64-NOT: leal ({{.*}},4)
 ; X64: %for.body.1
 
-; X32: sharedidx:
-; X32: %for.body.2
-; X32: add
-; X32: add
-; X32: add
-; X32: add
-; X32: add
-; X32: %for.body.3
+; X86: sharedidx:
+; X86: %for.body.2
+; X86: add
+; X86: add
+; X86: add
+; X86: add
+; X86: add
+; X86: %for.body.3
 define void @sharedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c, i32 %s, i32 %len) nounwind ssp {
 entry:
   %cmp8 = icmp eq i32 %len, 0

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll
index 613e65d0c650..240eb8c19744 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-insns-2.ll
@@ -1,6 +1,6 @@
-; RUN: opt < %s -loop-reduce -mtriple=x86_64 -S | FileCheck %s -check-prefix=BOTH -check-prefix=INSN
-; RUN: opt < %s -loop-reduce -mtriple=x86_64 -lsr-insns-cost=false -S | FileCheck %s -check-prefix=BOTH -check-prefix=REGS
-; RUN: llc < %s -O2 -march=x86-64 -lsr-insns-cost -asm-verbose=0 | FileCheck %s
+; RUN: opt < %s -loop-reduce -mtriple=x86_64-- -S | FileCheck %s -check-prefix=BOTH -check-prefix=INSN
+; RUN: opt < %s -loop-reduce -mtriple=x86_64-- -lsr-insns-cost=false -S | FileCheck %s -check-prefix=BOTH -check-prefix=REGS
+; RUN: llc < %s -O2 -mtriple=x86_64-- -lsr-insns-cost -asm-verbose=0 | FileCheck %s
 
 ; OPT checks that LSR prefers less instructions to less registers.
 ; For x86 LSR should prefer complicated address to new lsr induction