[llvm-branch-commits] [llvm] a5de2cb - [Xtensa] Add definitions and relocs for Xtensa ELF.
Andrei Safronov via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Aug 11 15:40:06 PDT 2020
Author: Andrei Safronov
Date: 2020-07-21T13:25:50+03:00
New Revision: a5de2cb07ee51335238913565f9a58ed73f1bac8
URL: https://github.com/llvm/llvm-project/commit/a5de2cb07ee51335238913565f9a58ed73f1bac8
DIFF: https://github.com/llvm/llvm-project/commit/a5de2cb07ee51335238913565f9a58ed73f1bac8.diff
LOG: [Xtensa] Add definitions and relocs for Xtensa ELF.
Added:
llvm/include/llvm/BinaryFormat/ELFRelocs/Xtensa.def
llvm/test/tools/llvm-readobj/ELF/reloc-types-xtensa.test
Modified:
llvm/include/llvm/BinaryFormat/ELF.h
llvm/include/llvm/Object/ELFObjectFile.h
llvm/include/llvm/module.modulemap
llvm/lib/Object/ELF.cpp
llvm/lib/ObjectYAML/ELFYAML.cpp
llvm/test/Object/obj2yaml.test
Removed:
################################################################################
diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h
index caab91da9c83..47ee28101513 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -767,6 +767,21 @@ enum {
#include "ELFRelocs/MSP430.def"
};
+// Xtensa specific e_flags
+enum : unsigned {
+ // Four-bit Xtensa machine type mask.
+ EF_XTENSA_MACH = 0x0000000f,
+ // Various CPU types.
+ EF_XTENSA_MACH_NONE = 0x00000000, //A base Xtensa implementation
+ EF_XTENSA_XT_INSN = 0x00000100,
+ EF_XTENSA_XT_LIT = 0x00000200,
+};
+
+// ELF Relocation types for Xtensa
+enum {
+#include "ELFRelocs/Xtensa.def"
+};
+
#undef ELF_RELOC
// Section header.
diff --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/Xtensa.def b/llvm/include/llvm/BinaryFormat/ELFRelocs/Xtensa.def
new file mode 100644
index 000000000000..becc5fb46920
--- /dev/null
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/Xtensa.def
@@ -0,0 +1,59 @@
+#ifndef ELF_RELOC
+#error "ELF_RELOC must be defined"
+#endif
+
+ELF_RELOC (R_XTENSA_NONE, 0)
+ELF_RELOC (R_XTENSA_32, 1)
+ELF_RELOC (R_XTENSA_RTLD, 2)
+ELF_RELOC (R_XTENSA_GLOB_DAT, 3)
+ELF_RELOC (R_XTENSA_JMP_SLOT, 4)
+ELF_RELOC (R_XTENSA_RELATIVE, 5)
+ELF_RELOC (R_XTENSA_PLT, 6)
+ELF_RELOC (R_XTENSA_OP0, 8)
+ELF_RELOC (R_XTENSA_OP1, 9)
+ELF_RELOC (R_XTENSA_OP2, 10)
+ELF_RELOC (R_XTENSA_ASM_EXPAND, 11)
+ELF_RELOC (R_XTENSA_ASM_SIMPLIFY, 12)
+ELF_RELOC (R_XTENSA_32_PCREL, 14)
+ELF_RELOC (R_XTENSA_GNU_VTINHERIT, 15)
+ELF_RELOC (R_XTENSA_GNU_VTENTRY, 16)
+ELF_RELOC (R_XTENSA_DIFF8, 17)
+ELF_RELOC (R_XTENSA_DIFF16, 18)
+ELF_RELOC (R_XTENSA_DIFF32, 19)
+ELF_RELOC (R_XTENSA_SLOT0_OP, 20)
+ELF_RELOC (R_XTENSA_SLOT1_OP, 21)
+ELF_RELOC (R_XTENSA_SLOT2_OP, 22)
+ELF_RELOC (R_XTENSA_SLOT3_OP, 23)
+ELF_RELOC (R_XTENSA_SLOT4_OP, 24)
+ELF_RELOC (R_XTENSA_SLOT5_OP, 25)
+ELF_RELOC (R_XTENSA_SLOT6_OP, 26)
+ELF_RELOC (R_XTENSA_SLOT7_OP, 27)
+ELF_RELOC (R_XTENSA_SLOT8_OP, 28)
+ELF_RELOC (R_XTENSA_SLOT9_OP, 29)
+ELF_RELOC (R_XTENSA_SLOT10_OP, 30)
+ELF_RELOC (R_XTENSA_SLOT11_OP, 31)
+ELF_RELOC (R_XTENSA_SLOT12_OP, 32)
+ELF_RELOC (R_XTENSA_SLOT13_OP, 33)
+ELF_RELOC (R_XTENSA_SLOT14_OP, 34)
+ELF_RELOC (R_XTENSA_SLOT0_ALT, 35)
+ELF_RELOC (R_XTENSA_SLOT1_ALT, 36)
+ELF_RELOC (R_XTENSA_SLOT2_ALT, 37)
+ELF_RELOC (R_XTENSA_SLOT3_ALT, 38)
+ELF_RELOC (R_XTENSA_SLOT4_ALT, 39)
+ELF_RELOC (R_XTENSA_SLOT5_ALT, 40)
+ELF_RELOC (R_XTENSA_SLOT6_ALT, 41)
+ELF_RELOC (R_XTENSA_SLOT7_ALT, 42)
+ELF_RELOC (R_XTENSA_SLOT8_ALT, 43)
+ELF_RELOC (R_XTENSA_SLOT9_ALT, 44)
+ELF_RELOC (R_XTENSA_SLOT10_ALT, 45)
+ELF_RELOC (R_XTENSA_SLOT11_ALT, 46)
+ELF_RELOC (R_XTENSA_SLOT12_ALT, 47)
+ELF_RELOC (R_XTENSA_SLOT13_ALT, 48)
+ELF_RELOC (R_XTENSA_SLOT14_ALT, 49)
+ELF_RELOC (R_XTENSA_TLSDESC_FN, 50)
+ELF_RELOC (R_XTENSA_TLSDESC_ARG, 51)
+ELF_RELOC (R_XTENSA_TLS_DTPOFF, 52)
+ELF_RELOC (R_XTENSA_TLS_TPOFF, 53)
+ELF_RELOC (R_XTENSA_TLS_FUNC, 54)
+ELF_RELOC (R_XTENSA_TLS_ARG, 55)
+ELF_RELOC (R_XTENSA_TLS_CALL, 56)
diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h
index 8a68e49477fd..10e07dd13ca5 100644
--- a/llvm/include/llvm/Object/ELFObjectFile.h
+++ b/llvm/include/llvm/Object/ELFObjectFile.h
@@ -1085,6 +1085,8 @@ StringRef ELFObjectFile<ELFT>::getFileFormatName() const {
return "ELF32-sparc";
case ELF::EM_AMDGPU:
return "ELF32-amdgpu";
+ case ELF::EM_XTENSA:
+ return "ELF32-Xtensa";
default:
return "ELF32-unknown";
}
@@ -1187,7 +1189,8 @@ template <class ELFT> Triple::ArchType ELFObjectFile<ELFT>::getArch() const {
case ELF::EM_BPF:
return IsLittleEndian ? Triple::bpfel : Triple::bpfeb;
-
+ case ELF::EM_XTENSA:
+ return Triple::xtensa;
default:
return Triple::UnknownArch;
}
diff --git a/llvm/include/llvm/module.modulemap b/llvm/include/llvm/module.modulemap
index d281682ae003..67e4dcf92656 100644
--- a/llvm/include/llvm/module.modulemap
+++ b/llvm/include/llvm/module.modulemap
@@ -72,6 +72,7 @@ module LLVM_BinaryFormat {
textual header "BinaryFormat/ELFRelocs/Sparc.def"
textual header "BinaryFormat/ELFRelocs/SystemZ.def"
textual header "BinaryFormat/ELFRelocs/x86_64.def"
+ textual header "BinaryFormat/ELFRelocs/Xtensa.def"
textual header "BinaryFormat/WasmRelocs.def"
textual header "BinaryFormat/MsgPack.def"
}
diff --git a/llvm/lib/Object/ELF.cpp b/llvm/lib/Object/ELF.cpp
index f17a6da23d7d..6508c33233f8 100644
--- a/llvm/lib/Object/ELF.cpp
+++ b/llvm/lib/Object/ELF.cpp
@@ -145,6 +145,13 @@ StringRef llvm::object::getELFRelocationTypeName(uint32_t Machine,
break;
}
break;
+ case ELF::EM_XTENSA:
+ switch (Type) {
+#include "llvm/BinaryFormat/ELFRelocs/Xtensa.def"
+ default:
+ break;
+ }
+ break;
default:
break;
}
diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp
index efa7ecb4728b..c8fa53a4ce24 100644
--- a/llvm/lib/ObjectYAML/ELFYAML.cpp
+++ b/llvm/lib/ObjectYAML/ELFYAML.cpp
@@ -428,6 +428,11 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
break;
case ELF::EM_X86_64:
break;
+ case ELF::EM_XTENSA:
+ BCase(EF_XTENSA_XT_INSN);
+ BCaseMask(EF_XTENSA_MACH_NONE, EF_XTENSA_MACH);
+ BCase(EF_XTENSA_XT_LIT);
+ break;
default:
llvm_unreachable("Unsupported architecture");
}
@@ -657,6 +662,9 @@ void ScalarEnumerationTraits<ELFYAML::ELF_REL>::enumeration(
case ELF::EM_PPC64:
#include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
break;
+ case ELF::EM_XTENSA:
+#include "llvm/BinaryFormat/ELFRelocs/Xtensa.def"
+ break;
default:
// Nothing to do.
break;
diff --git a/llvm/test/Object/obj2yaml.test b/llvm/test/Object/obj2yaml.test
index badc604239a1..e352705ebcbc 100644
--- a/llvm/test/Object/obj2yaml.test
+++ b/llvm/test/Object/obj2yaml.test
@@ -524,7 +524,7 @@
# ELF-MIPS64EL-NEXT: - Name: zed
# ELF-MIPS64EL-NEXT: Binding: STB_GLOBAL
-# RUN: yaml2obj %s > %t-x86-64
+# RUN: yaml2obj --docnum=1 %s -o %t-x86-64
# RUN: obj2yaml %t-x86-64 | FileCheck %s --check-prefix ELF-X86-64
# ELF-X86-64: FileHeader:
@@ -656,6 +656,25 @@ Symbols:
- Name: puts
Binding: STB_GLOBAL
+# RUN: yaml2obj --docnum=2 %s -o %t-xtensa
+# RUN: obj2yaml %t-xtensa | FileCheck %s --check-prefix ELF-XTENSA
+
+# ELF-XTENSA: FileHeader:
+# ELF-XTENSA-NEXT: Class: ELFCLASS32
+# ELF-XTENSA-NEXT: Data: ELFDATA2LSB
+# ELF-XTENSA-NEXT: Type: ET_EXEC
+# ELF-XTENSA-NEXT: Machine: EM_XTENSA
+## As EF_XTENSA_MACH_NONE == 0, it is always printed by obj2yaml.
+# ELF-XTENSA-NEXT: Flags: [ EF_XTENSA_XT_INSN, EF_XTENSA_MACH_NONE, EF_XTENSA_XT_LIT ]
+
+--- !ELF
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_EXEC
+ Machine: EM_XTENSA
+ Flags: [ EF_XTENSA_XT_INSN, EF_XTENSA_XT_LIT ]
+
# RUN: obj2yaml %p/Inputs/trivial-object-test.elf-avr | FileCheck %s --check-prefix ELF-AVR
# ELF-AVR: FileHeader:
diff --git a/llvm/test/tools/llvm-readobj/ELF/reloc-types-xtensa.test b/llvm/test/tools/llvm-readobj/ELF/reloc-types-xtensa.test
new file mode 100644
index 000000000000..eba6b28b10a1
--- /dev/null
+++ b/llvm/test/tools/llvm-readobj/ELF/reloc-types-xtensa.test
@@ -0,0 +1,182 @@
+## Test that llvm-readobj shows proper relocation type
+## names and values for the Xtensa target.
+
+# RUN: yaml2obj %s -o %t-xtensa.o
+# RUN: llvm-readobj -r --expand-relocs %t-xtensa.o | FileCheck %s
+
+# CHECK: Type: R_XTENSA_NONE (0)
+# CHECK: Type: R_XTENSA_32 (1)
+# CHECK: Type: R_XTENSA_RTLD (2)
+# CHECK: Type: R_XTENSA_GLOB_DAT (3)
+# CHECK: Type: R_XTENSA_JMP_SLOT (4)
+# CHECK: Type: R_XTENSA_RELATIVE (5)
+# CHECK: Type: R_XTENSA_PLT (6)
+# CHECK: Type: R_XTENSA_OP0 (8)
+# CHECK: Type: R_XTENSA_OP1 (9)
+# CHECK: Type: R_XTENSA_OP2 (10)
+# CHECK: Type: R_XTENSA_ASM_EXPAND (11)
+# CHECK: Type: R_XTENSA_ASM_SIMPLIFY (12)
+# CHECK: Type: R_XTENSA_32_PCREL (14)
+# CHECK: Type: R_XTENSA_GNU_VTINHERIT (15)
+# CHECK: Type: R_XTENSA_GNU_VTENTRY (16)
+# CHECK: Type: R_XTENSA_DIFF8 (17)
+# CHECK: Type: R_XTENSA_DIFF16 (18)
+# CHECK: Type: R_XTENSA_DIFF32 (19)
+# CHECK: Type: R_XTENSA_SLOT0_OP (20)
+# CHECK: Type: R_XTENSA_SLOT1_OP (21)
+# CHECK: Type: R_XTENSA_SLOT2_OP (22)
+# CHECK: Type: R_XTENSA_SLOT3_OP (23)
+# CHECK: Type: R_XTENSA_SLOT4_OP (24)
+# CHECK: Type: R_XTENSA_SLOT5_OP (25)
+# CHECK: Type: R_XTENSA_SLOT6_OP (26)
+# CHECK: Type: R_XTENSA_SLOT7_OP (27)
+# CHECK: Type: R_XTENSA_SLOT8_OP (28)
+# CHECK: Type: R_XTENSA_SLOT9_OP (29)
+# CHECK: Type: R_XTENSA_SLOT10_OP (30)
+# CHECK: Type: R_XTENSA_SLOT11_OP (31)
+# CHECK: Type: R_XTENSA_SLOT12_OP (32)
+# CHECK: Type: R_XTENSA_SLOT13_OP (33)
+# CHECK: Type: R_XTENSA_SLOT14_OP (34)
+# CHECK: Type: R_XTENSA_SLOT0_ALT (35)
+# CHECK: Type: R_XTENSA_SLOT1_ALT (36)
+# CHECK: Type: R_XTENSA_SLOT2_ALT (37)
+# CHECK: Type: R_XTENSA_SLOT3_ALT (38)
+# CHECK: Type: R_XTENSA_SLOT4_ALT (39)
+# CHECK: Type: R_XTENSA_SLOT5_ALT (40)
+# CHECK: Type: R_XTENSA_SLOT6_ALT (41)
+# CHECK: Type: R_XTENSA_SLOT7_ALT (42)
+# CHECK: Type: R_XTENSA_SLOT8_ALT (43)
+# CHECK: Type: R_XTENSA_SLOT9_ALT (44)
+# CHECK: Type: R_XTENSA_SLOT10_ALT (45)
+# CHECK: Type: R_XTENSA_SLOT11_ALT (46)
+# CHECK: Type: R_XTENSA_SLOT12_ALT (47)
+# CHECK: Type: R_XTENSA_SLOT13_ALT (48)
+# CHECK: Type: R_XTENSA_SLOT14_ALT (49)
+# CHECK: Type: R_XTENSA_TLSDESC_FN (50)
+# CHECK: Type: R_XTENSA_TLSDESC_ARG (51)
+# CHECK: Type: R_XTENSA_TLS_DTPOFF (52)
+# CHECK: Type: R_XTENSA_TLS_TPOFF (53)
+# CHECK: Type: R_XTENSA_TLS_FUNC (54)
+# CHECK: Type: R_XTENSA_TLS_ARG (55)
+# CHECK: Type: R_XTENSA_TLS_CALL (56)
+
+--- !ELF
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_XTENSA
+Sections:
+ - Name: .rela.text
+ Type: SHT_RELA
+ Relocations:
+ - Offset: 0x0000000000000000
+ Type: R_XTENSA_NONE
+ - Offset: 0x0000000000000004
+ Type: R_XTENSA_32
+ - Offset: 0x0000000000000008
+ Type: R_XTENSA_RTLD
+ - Offset: 0x000000000000000C
+ Type: R_XTENSA_GLOB_DAT
+ - Offset: 0x0000000000000010
+ Type: R_XTENSA_JMP_SLOT
+ - Offset: 0x0000000000000014
+ Type: R_XTENSA_RELATIVE
+ - Offset: 0x0000000000000018
+ Type: R_XTENSA_PLT
+ - Offset: 0x000000000000001C
+ Type: R_XTENSA_OP0
+ - Offset: 0x0000000000000020
+ Type: R_XTENSA_OP1
+ - Offset: 0x0000000000000024
+ Type: R_XTENSA_OP2
+ - Offset: 0x0000000000000028
+ Type: R_XTENSA_ASM_EXPAND
+ - Offset: 0x000000000000002C
+ Type: R_XTENSA_ASM_SIMPLIFY
+ - Offset: 0x0000000000000030
+ Type: R_XTENSA_32_PCREL
+ - Offset: 0x0000000000000034
+ Type: R_XTENSA_GNU_VTINHERIT
+ - Offset: 0x0000000000000038
+ Type: R_XTENSA_GNU_VTENTRY
+ - Offset: 0x000000000000003C
+ Type: R_XTENSA_DIFF8
+ - Offset: 0x0000000000000040
+ Type: R_XTENSA_DIFF16
+ - Offset: 0x0000000000000044
+ Type: R_XTENSA_DIFF32
+ - Offset: 0x0000000000000048
+ Type: R_XTENSA_SLOT0_OP
+ - Offset: 0x000000000000004C
+ Type: R_XTENSA_SLOT1_OP
+ - Offset: 0x0000000000000050
+ Type: R_XTENSA_SLOT2_OP
+ - Offset: 0x0000000000000054
+ Type: R_XTENSA_SLOT3_OP
+ - Offset: 0x0000000000000058
+ Type: R_XTENSA_SLOT4_OP
+ - Offset: 0x000000000000005C
+ Type: R_XTENSA_SLOT5_OP
+ - Offset: 0x0000000000000060
+ Type: R_XTENSA_SLOT6_OP
+ - Offset: 0x0000000000000064
+ Type: R_XTENSA_SLOT7_OP
+ - Offset: 0x0000000000000068
+ Type: R_XTENSA_SLOT8_OP
+ - Offset: 0x000000000000006C
+ Type: R_XTENSA_SLOT9_OP
+ - Offset: 0x0000000000000070
+ Type: R_XTENSA_SLOT10_OP
+ - Offset: 0x0000000000000074
+ Type: R_XTENSA_SLOT11_OP
+ - Offset: 0x0000000000000078
+ Type: R_XTENSA_SLOT12_OP
+ - Offset: 0x000000000000007C
+ Type: R_XTENSA_SLOT13_OP
+ - Offset: 0x0000000000000080
+ Type: R_XTENSA_SLOT14_OP
+ - Offset: 0x0000000000000084
+ Type: R_XTENSA_SLOT0_ALT
+ - Offset: 0x0000000000000088
+ Type: R_XTENSA_SLOT1_ALT
+ - Offset: 0x000000000000008C
+ Type: R_XTENSA_SLOT2_ALT
+ - Offset: 0x0000000000000090
+ Type: R_XTENSA_SLOT3_ALT
+ - Offset: 0x0000000000000094
+ Type: R_XTENSA_SLOT4_ALT
+ - Offset: 0x0000000000000098
+ Type: R_XTENSA_SLOT5_ALT
+ - Offset: 0x000000000000009C
+ Type: R_XTENSA_SLOT6_ALT
+ - Offset: 0x00000000000000A0
+ Type: R_XTENSA_SLOT7_ALT
+ - Offset: 0x00000000000000A4
+ Type: R_XTENSA_SLOT8_ALT
+ - Offset: 0x00000000000000A8
+ Type: R_XTENSA_SLOT9_ALT
+ - Offset: 0x00000000000000AC
+ Type: R_XTENSA_SLOT10_ALT
+ - Offset: 0x00000000000000B0
+ Type: R_XTENSA_SLOT11_ALT
+ - Offset: 0x00000000000000B4
+ Type: R_XTENSA_SLOT12_ALT
+ - Offset: 0x00000000000000B8
+ Type: R_XTENSA_SLOT13_ALT
+ - Offset: 0x00000000000000BC
+ Type: R_XTENSA_SLOT14_ALT
+ - Offset: 0x00000000000000C0
+ Type: R_XTENSA_TLSDESC_FN
+ - Offset: 0x00000000000000C4
+ Type: R_XTENSA_TLSDESC_ARG
+ - Offset: 0x00000000000000C8
+ Type: R_XTENSA_TLS_DTPOFF
+ - Offset: 0x00000000000000CC
+ Type: R_XTENSA_TLS_TPOFF
+ - Offset: 0x00000000000000D0
+ Type: R_XTENSA_TLS_FUNC
+ - Offset: 0x00000000000000D4
+ Type: R_XTENSA_TLS_ARG
+ - Offset: 0x00000000000000D8
+ Type: R_XTENSA_TLS_CALL
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