[llvm-branch-commits] [llvm-branch] r368411 - [docs][mips] 9.0 Release notes

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Fri Aug  9 01:35:17 2019
New Revision: 368411

URL: http://llvm.org/viewvc/llvm-project?rev=368411&view=rev
Log:
[docs][mips] 9.0 Release notes

By Simon Atanasyan!

Differential revision: https://reviews.llvm.org/D65830

Modified:
    llvm/branches/release_90/docs/ReleaseNotes.rst

Modified: llvm/branches/release_90/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/docs/ReleaseNotes.rst?rev=368411&r1=368410&r2=368411&view=diff
==============================================================================
--- llvm/branches/release_90/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_90/docs/ReleaseNotes.rst Fri Aug  9 01:35:17 2019
@@ -115,7 +115,19 @@ Changes to the ARM Backend
 Changes to the MIPS Target
 --------------------------
 
- During this release ...
+* Support for ``.cplocal`` assembler directive.
+
+* Support for ``sge``, ``sgeu``, ``sgt``, ``sgtu`` pseudo instructions.
+
+* Support for ``o`` inline asm constraint.
+
+* Improved support of GlobalISel instruction selection framework.
+  This feature is still in experimental state for MIPS targets though.
+
+* Various code-gen improvements, related to improved and fixed instruction
+  selection and encoding and floating-point registers allocation.
+
+* Complete P5600 scheduling model.
 
 
 Changes to the PowerPC Target