[llvm-branch-commits] [cfe-branch] r348682 - Merging r345826:

[Tom Stellard via llvm-branch-commits]

Author: tstellar
Date: Fri Dec  7 20:42:42 2018
New Revision: 348682

URL: http://llvm.org/viewvc/llvm-project?rev=348682&view=rev
Log:
Merging r345826:

------------------------------------------------------------------------
r345826 | erichkeane | 2018-11-01 05:50:37 -0700 (Thu, 01 Nov 2018) | 15 lines

CPU-Dispatch-- Fix conflict between 'generic' and 'pentium'

When a dispatch function was being emitted that had both a generic and a
pentium configuration listed, we would assert.  This is because neither
configuration has any 'features' associated with it so they were both
considered the 'default' version.  'pentium' lacks any features because
we implement it in terms of __builtin_cpu_supports (instead of Intel
proprietary checks), which is unable to decern between the two.

The fix for this is to omit the 'generic' version from the dispatcher if
both are present. This permits existing code to compile, and still will
choose the 'best' version available (since 'pentium' is technically
better than 'generic').

Change-Id: I4b69f3e0344e74cbdbb04497845d5895dd05fda0
------------------------------------------------------------------------

Modified:
    cfe/branches/release_70/lib/CodeGen/CodeGenModule.cpp
    cfe/branches/release_70/test/CodeGen/attr-cpuspecific.c

Modified: cfe/branches/release_70/lib/CodeGen/CodeGenModule.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_70/lib/CodeGen/CodeGenModule.cpp?rev=348682&r1=348681&r2=348682&view=diff
==============================================================================
--- cfe/branches/release_70/lib/CodeGen/CodeGenModule.cpp (original)
+++ cfe/branches/release_70/lib/CodeGen/CodeGenModule.cpp Fri Dec  7 20:42:42 2018
@@ -2505,6 +2505,22 @@ void CodeGenModule::emitCPUDispatchDefin
         return CodeGenFunction::GetX86CpuSupportsMask(LHS.Conditions.Features) >
                CodeGenFunction::GetX86CpuSupportsMask(RHS.Conditions.Features);
       });
+
+  // If the list contains multiple 'default' versions, such as when it contains
+  // 'pentium' and 'generic', don't emit the call to the generic one (since we
+  // always run on at least a 'pentium'). We do this by deleting the 'least
+  // advanced' (read, lowest mangling letter).
+  while (Options.size() > 1 &&
+         CodeGenFunction::GetX86CpuSupportsMask(
+             (Options.end() - 2)->Conditions.Features) == 0) {
+    StringRef LHSName = (Options.end() - 2)->Function->getName();
+    StringRef RHSName = (Options.end() - 1)->Function->getName();
+    if (LHSName.compare(RHSName) < 0)
+      Options.erase(Options.end() - 2);
+    else
+      Options.erase(Options.end() - 1);
+  }
+
   CodeGenFunction CGF(*this);
   CGF.EmitMultiVersionResolver(ResolverFunc, Options);
 }

Modified: cfe/branches/release_70/test/CodeGen/attr-cpuspecific.c
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/release_70/test/CodeGen/attr-cpuspecific.c?rev=348682&r1=348681&r2=348682&view=diff
==============================================================================
--- cfe/branches/release_70/test/CodeGen/attr-cpuspecific.c (original)
+++ cfe/branches/release_70/test/CodeGen/attr-cpuspecific.c Fri Dec  7 20:42:42 2018
@@ -96,6 +96,15 @@ void HasGeneric(void);
 // CHECK: ret void ()* @HasGeneric.A
 // CHECK-NOT: call void @llvm.trap
 
+__attribute__((cpu_dispatch(atom, generic, pentium)))
+int GenericAndPentium(int i, double d);
+// CHECK: define i32 (i32, double)* @GenericAndPentium.resolver()
+// CHECK: call void @__cpu_indicator_init
+// CHECK: ret i32 (i32, double)* @GenericAndPentium.O
+// CHECK: ret i32 (i32, double)* @GenericAndPentium.B
+// CHECK-NOT: ret i32 (i32, double)* @GenericAndPentium.A
+// CHECK-NOT: call void @llvm.trap
+
 // CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+f16c,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
 // CHECK: attributes #[[K]] = {{.*}}"target-features"="+adx,+avx,+avx2,+avx512cd,+avx512er,+avx512f,+avx512pf,+bmi,+cmov,+f16c,+fma,+lzcnt,+mmx,+movbe,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
 // CHECK: attributes #[[O]] = {{.*}}"target-features"="+cmov,+mmx,+movbe,+sse,+sse2,+sse3,+ssse3,+x87"