[llvm-branch-commits] [llvm-branch] r217304 - Update PowerPC target information.

[Bill Wendling]

Author: void
Date: Fri Sep  5 22:26:11 2014
New Revision: 217304

URL: http://llvm.org/viewvc/llvm-project?rev=217304&view=rev
Log:
Update PowerPC target information.

Modified:
    llvm/branches/release_35/docs/ReleaseNotes.rst

Modified: llvm/branches/release_35/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/docs/ReleaseNotes.rst?rev=217304&r1=217303&r2=217304&view=diff
==============================================================================
--- llvm/branches/release_35/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_35/docs/ReleaseNotes.rst Fri Sep  5 22:26:11 2014
@@ -217,6 +217,37 @@ We had also decided that the name of the
 following ARM's official documentation. So, at the end of May the old
 AArch64 directory was removed, and ARM64 renamed into its place.
 
+Changes to the PowerPC Target
+-----------------------------
+
+The PowerPC 64-bit Little Endian subtarget (powerpc64le-unknown-linux-gnu) is
+now fully supported.  This includes support for the Altivec instruction set.
+
+The Power Architecture 64-Bit ELFv2 ABI Specification is now supported, and
+is the default ABI for Little Endian.  The ELFv1 ABI remains the default ABI
+for Big Endian.  Currently, it is not possible to override these defaults.
+That capability will be available (albeit not recommended) in a future release.
+
+Links to the ELFv2 ABI specification and to the Power ISA Version 2.07
+specification may be found `here <https://www-03.ibm.com/technologyconnect/tgcm/TGCMServlet.wss?alias=OpenPOWER&linkid=1n0000>`_ (free registration required).
+Efforts are underway to move this to a location that doesn't require
+registration, but the planned site isn't ready yet.
+
+Experimental support for the VSX instruction set introduced with ISA 2.06
+is now available using the ``-mvsx`` switch.  Work remains on this, so it
+is not recommended for production use.  VSX is disabled for Little Endian
+regardless of this switch setting.
+
+Load/store cost estimates have been improved.
+
+Constant hoisting has been enabled.
+
+Global named register support has been enabled.
+
+Initial support for PIC code has been added for the 32-bit ELF subtarget.
+Further support will be available in a future release.
+
+
 Changes to CMake build system
 -----------------------------