[llvm-branch-commits] [llvm-branch] r204650 - Merging r203818:
Tom Stellard
thomas.stellard at amd.com
Mon Mar 24 11:21:44 PDT 2014
Author: tstellar
Date: Mon Mar 24 13:21:44 2014
New Revision: 204650
URL: http://llvm.org/viewvc/llvm-project?rev=204650&view=rev
Log:
Merging r203818:
------------------------------------------------------------------------
r203818 | thomas.stellard | 2014-03-13 10:13:04 -0700 (Thu, 13 Mar 2014) | 7 lines
R600: LDS instructions shouldn't implicitly define OQAP
LDS instructions are pseudo instructions which model
the OQAP defs and uses within a single instruction.
This fixes a hang in the opencv MedianFilter tests.
Added:
llvm/branches/release_34/test/CodeGen/R600/lds-oqap-crash.ll
Modified:
llvm/branches/release_34/lib/Target/R600/R600Instructions.td
Modified: llvm/branches/release_34/lib/Target/R600/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/R600/R600Instructions.td?rev=204650&r1=204649&r2=204650&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/R600/R600Instructions.td (original)
+++ llvm/branches/release_34/lib/Target/R600/R600Instructions.td Mon Mar 24 13:21:44 2014
@@ -1638,7 +1638,6 @@ class R600_LDS_1A <bits<6> lds_op, strin
let src2 = 0;
let src2_rel = 0;
- let Defs = [OQAP];
let usesCustomInserter = 1;
let LDS_1A = 1;
let DisableEncoding = "$dst";
@@ -1674,7 +1673,6 @@ class R600_LDS_1A1D_RET <bits<6> lds_op,
let BaseOp = name;
let usesCustomInserter = 1;
let DisableEncoding = "$dst";
- let Defs = [OQAP];
}
class R600_LDS_1A2D <bits<6> lds_op, string name, list<dag> pattern> :
Added: llvm/branches/release_34/test/CodeGen/R600/lds-oqap-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/R600/lds-oqap-crash.ll?rev=204650&view=auto
==============================================================================
--- llvm/branches/release_34/test/CodeGen/R600/lds-oqap-crash.ll (added)
+++ llvm/branches/release_34/test/CodeGen/R600/lds-oqap-crash.ll Mon Mar 24 13:21:44 2014
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood -verify-machineinstrs | FileCheck %s
+
+; The test is for a bug in R600EmitClauseMarkers.cpp where this pass
+; was searching for a use of the OQAP register in order to determine
+; if an LDS instruction could fit in the current clause, but never finding
+; one. This created an infinite loop and hung the compiler.
+;
+; The LDS instruction should not have been defining OQAP in the first place,
+; because the LDS instructions are pseudo instructions and the OQAP
+; reads and writes are bundled together in the same instruction.
+
+; CHECK: @lds_crash
+define void @lds_crash(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %a, i32 %b, i32 %c) {
+entry:
+ %0 = load i32 addrspace(3)* %in
+ ; This block needs to be > 115 ISA instructions to hit the bug,
+ ; so we'll use udiv instructions.
+ %div0 = udiv i32 %0, %b
+ %div1 = udiv i32 %div0, %a
+ %div2 = udiv i32 %div1, 11
+ %div3 = udiv i32 %div2, %a
+ %div4 = udiv i32 %div3, %b
+ %div5 = udiv i32 %div4, %c
+ %div6 = udiv i32 %div5, %div0
+ %div7 = udiv i32 %div6, %div1
+ store i32 %div7, i32 addrspace(1)* %out
+ ret void
+}
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