[llvm-branch-commits] [llvm-branch] r223231 - Added release notes for the Mips target.

Daniel Sanders daniel.sanders at imgtec.com
Wed Dec 3 05:43:40 PST 2014

Author: dsanders
Date: Wed Dec  3 07:43:39 2014
New Revision: 223231

URL: http://llvm.org/viewvc/llvm-project?rev=223231&view=rev
Added release notes for the Mips target.


Modified: llvm/branches/release_35/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/docs/ReleaseNotes.rst?rev=223231&r1=223230&r2=223231&view=diff
--- llvm/branches/release_35/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_35/docs/ReleaseNotes.rst Wed Dec  3 07:43:39 2014
@@ -24,6 +24,40 @@ them.
 Non-comprehensive list of changes in this release
+Changes to the MIPS Target
+* A large number of bugs have been fixed for big-endian Mips targets using the
+  N32 and N64 ABI's. Please note that some of these bugs will still affect
+  LLVM-IR generated by LLVM 3.5 since correct code generation depends on
+  appropriate usage of the ``inreg``, ``signext``, and ``zeroext`` attributes
+  on all function arguments and returns.
+* The registers used to return a structure containing a single 128-bit floating
+  point member on the N32/N64 ABI's have been changed from those specified by
+  the ABI documentation to match those used by GCC. The documentation specifies
+  that ``$f0`` and ``$f2`` should be used but GCC has used ``$f0`` and ``$f1``
+  for many years.
+* Returning a zero-byte struct no longer causes incorrect code generation when
+  using the O32 ABI.
+* The exception personality has been changed for 64-bit Mips targets to
+  eliminate warnings about relocations in a read-only section.
+* Incorrect usage of odd-numbered single-precision floating point registers
+  has been fixed when the fastcc calling convention is used with 64-bit FPU's
+  and -mno-odd-spreg.
+* For inline assembly, the 'z' print-modifier print modifier can now be used on
+  non-immediate values.
+* Attempting to disassemble l[wd]c[23], s[wd]c[23], cache, and pref no longer
+  triggers an assertion.
+Non-comprehensive list of changes in 3.5
 * All backends have been changed to use the MC asm printer and support for the
   non MC one has been removed.

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