[llvm-branch-commits] [llvm-branch] r223017 - Merged from r218036:

Daniel Sanders daniel.sanders at imgtec.com
Mon Dec 1 05:34:51 PST 2014


Author: dsanders
Date: Mon Dec  1 07:34:51 2014
New Revision: 223017

URL: http://llvm.org/viewvc/llvm-project?rev=223017&view=rev
Log:
Merged from r218036:

[mips] Remove custom versions of CCState::AnalyzeReturn() and CCState::AnalyzeCallReturn().

Summary:
The N32/N64 ABI's return f128 values in $f0 and $f2 for hard-float and $v0 and
$a0 for soft-float. The registers used in the soft-float case differ from the
usual $v0, and $v1 specified for return values.

Both cases were previously handled by duplicating the CCState::AnalyzeReturn()
and CCState::AnalyzeCallReturn() functions and modifying them to delegate to
a different assignment function for f128 and further replace the register type
for the hard-float case. There is a simpler way to do both of these.

We now use the common functions and select an initial assignment function based
on whether the original type is f128 or not. We then handle the hard-float case
using CCBitConvertToType<>.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5269


Modified:
    llvm/branches/release_35/lib/Target/Mips/MipsCallingConv.td
    llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp
    llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h

Modified: llvm/branches/release_35/lib/Target/Mips/MipsCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsCallingConv.td?rev=223017&r1=223016&r2=223017&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/Mips/MipsCallingConv.td (original)
+++ llvm/branches/release_35/lib/Target/Mips/MipsCallingConv.td Mon Dec  1 07:34:51 2014
@@ -105,10 +105,25 @@ def RetCC_MipsN : CallingConv<[
   CCIfType<[f64], CCAssignToReg<[D0_64, D2_64]>>
 ]>;
 
-// In soft-mode, register A0_64, instead of V1_64, is used to return a long
-// double value.
-def RetCC_F128Soft : CallingConv<[
-  CCIfType<[i64], CCAssignToReg<[V0_64, A0_64]>>
+// For soft-float, f128 values are returned in A0_64 rather than V1_64.
+def RetCC_F128SoftFloat : CallingConv<[
+  CCAssignToReg<[V0_64, A0_64]>
+]>;
+
+// For hard-float, f128 values are returned as a pair of f64's rather than a
+// pair of i64's.
+def RetCC_F128HardFloat : CallingConv<[
+  CCBitConvertToType<f64>,
+  CCAssignToReg<[D0_64, D2_64]>
+]>;
+
+// Handle F128 specially since we can't identify the original type during the
+// tablegen-erated code.
+def RetCC_F128 : CallingConv<[
+  CCIfSubtarget<"abiUsesSoftFloat()",
+      CCIfType<[i64], CCDelegateTo<RetCC_F128SoftFloat>>>,
+  CCIfSubtargetNot<"abiUsesSoftFloat()",
+      CCIfType<[i64], CCDelegateTo<RetCC_F128HardFloat>>>
 ]>;
 
 //===----------------------------------------------------------------------===//

Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp?rev=223017&r1=223016&r2=223017&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp Mon Dec  1 07:34:51 2014
@@ -2365,6 +2365,8 @@ static bool CC_MipsO32_FP64(unsigned Val
   return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs);
 }
 
+static bool originalTypeIsF128(const Type *Ty, const SDNode *CallNode);
+
 #include "MipsGenCallingConv.inc"
 
 //===----------------------------------------------------------------------===//
@@ -2677,10 +2679,11 @@ MipsTargetLowering::LowerCallResult(SDVa
   SmallVector<CCValAssign, 16> RVLocs;
   CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
                  getTargetMachine(), RVLocs, *DAG.getContext());
-  MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
 
-  MipsCCInfo.analyzeCallResult(Ins, Subtarget.abiUsesSoftFloat(),
-                               CallNode, RetTy);
+  if (originalTypeIsF128(RetTy, CallNode))
+    CCInfo.AnalyzeCallResult(Ins, RetCC_F128);
+  else
+    CCInfo.AnalyzeCallResult(Ins, RetCC_Mips);
 
   // Copy all of the result registers out of their specified physreg.
   for (unsigned i = 0; i != RVLocs.size(); ++i) {
@@ -2879,8 +2882,10 @@ MipsTargetLowering::LowerReturn(SDValue
   MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
 
   // Analyze return values.
-  MipsCCInfo.analyzeReturn(Outs, Subtarget.abiUsesSoftFloat(),
-                           MF.getFunction()->getReturnType());
+  if (originalTypeIsF128(MF.getFunction()->getReturnType(), nullptr))
+    CCInfo.AnalyzeReturn(Outs, RetCC_F128);
+  else
+    CCInfo.AnalyzeReturn(Outs, RetCC_Mips);
 
   SDValue Flag;
   SmallVector<SDValue, 4> RetOps(1, Chain);
@@ -3463,44 +3468,6 @@ analyzeFormalArguments(const SmallVector
   }
 }
 
-template<typename Ty>
-void MipsTargetLowering::MipsCC::
-analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat,
-              const SDNode *CallNode, const Type *RetTy) const {
-  CCAssignFn *Fn;
-
-  if (IsSoftFloat && originalTypeIsF128(RetTy, CallNode))
-    Fn = RetCC_F128Soft;
-  else
-    Fn = RetCC_Mips;
-
-  for (unsigned I = 0, E = RetVals.size(); I < E; ++I) {
-    MVT VT = RetVals[I].VT;
-    ISD::ArgFlagsTy Flags = RetVals[I].Flags;
-    MVT RegVT = this->getRegVT(VT, RetTy, CallNode, IsSoftFloat);
-
-    if (Fn(I, VT, RegVT, CCValAssign::Full, Flags, this->CCInfo)) {
-#ifndef NDEBUG
-      dbgs() << "Call result #" << I << " has unhandled type "
-             << EVT(VT).getEVTString() << '\n';
-#endif
-      llvm_unreachable(nullptr);
-    }
-  }
-}
-
-void MipsTargetLowering::MipsCC::
-analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, bool IsSoftFloat,
-                  const SDNode *CallNode, const Type *RetTy) const {
-  analyzeReturn(Ins, IsSoftFloat, CallNode, RetTy);
-}
-
-void MipsTargetLowering::MipsCC::
-analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsSoftFloat,
-              const Type *RetTy) const {
-  analyzeReturn(Outs, IsSoftFloat, nullptr, RetTy);
-}
-
 void MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT,
                                                 MVT LocVT,
                                                 CCValAssign::LocInfo LocInfo,

Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h?rev=223017&r1=223016&r2=223017&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h Mon Dec  1 07:34:51 2014
@@ -367,13 +367,6 @@ namespace llvm {
                                   bool IsSoftFloat,
                                   Function::const_arg_iterator FuncArg);
 
-      void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
-                             bool IsSoftFloat, const SDNode *CallNode,
-                             const Type *RetTy) const;
-
-      void analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
-                         bool IsSoftFloat, const Type *RetTy) const;
-
       const CCState &getCCInfo() const { return CCInfo; }
 
       /// hasByValArg - Returns true if function has byval arguments.





More information about the llvm-branch-commits mailing list