[llvm-branch-commits] [llvm-branch] r164603 - /llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td
Tom Stellard
thomas.stellard at amd.com
Tue Sep 25 06:59:15 PDT 2012
Author: tstellar
Date: Tue Sep 25 08:59:15 2012
New Revision: 164603
URL: http://llvm.org/viewvc/llvm-project?rev=164603&view=rev
Log:
R600: Fix typo in R600RegisterInfo.td
Modified:
llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td
Modified: llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td?rev=164603&r1=164602&r2=164603&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td Tue Sep 25 08:59:15 2012
@@ -49,7 +49,7 @@
(interleave (sequence "C%u_X", 0, 127),
(sequence "C%u_Z", 0, 127)),
(interleave (sequence "C%u_Y", 0, 127),
- (sequence "C%u_Z", 0, 127))))>;
+ (sequence "C%u_W", 0, 127))))>;
def R600_TReg32_X : RegisterClass <"AMDGPU", [f32, i32], 32,
(add (sequence "T%u_X", 0, 127))>;
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