[llvm-branch-commits] [llvm-branch] r77572 - /llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp

[Bill Wendling]

Author: void
Date: Wed Jul 29 21:48:02 2009
New Revision: 77572

URL: http://llvm.org/viewvc/llvm-project?rev=77572&view=rev
Log:
--- Reverse-merging r76094 into '.':
U    lib/Target/X86/X86InstrInfo.cpp

Revert r76094 from Bender branch. It wasn't needed, and was causing other
failures.

Modified:
    llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp?rev=77572&r1=77571&r2=77572&view=diff

==============================================================================
--- llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Bender-SWB/lib/Target/X86/X86InstrInfo.cpp Wed Jul 29 21:48:02 2009
@@ -2250,15 +2250,13 @@
 
     // x86-32 PIC requires a PIC base register for constant pools.
     unsigned PICBase = 0;
-    if (TM.getRelocationModel() == Reloc::PIC_)
-      if (TM.getSubtarget<X86Subtarget>().is64Bit())
-        PICBase = X86::RIP;
-      else 
-        // FIXME: PICBase = TM.getInstrInfo()->getGlobalBaseReg(&MF);
-        // This doesn't work for several reasons.
-        // 1. GlobalBaseReg may have been spilled.
-        // 2. It may not be live at MI.
-        return false;
+    if (TM.getRelocationModel() == Reloc::PIC_ &&
+        !TM.getSubtarget<X86Subtarget>().is64Bit())
+      // FIXME: PICBase = TM.getInstrInfo()->getGlobalBaseReg(&MF);
+      // This doesn't work for several reasons.
+      // 1. GlobalBaseReg may have been spilled.
+      // 2. It may not be live at MI.
+      return false;
 
     // Create a v4i32 constant-pool entry.
     MachineConstantPool &MCP = *MF.getConstantPool();