[clang] [clang-format] Preserve compact TableGen bit ranges (PR #215837)

[Yuwei Zhao via cfe-commits]

https://github.com/fyrsta7 updated https://github.com/llvm/llvm-project/pull/215837

>From 0a8027a9b470f2058e0296fa9d05ccbb91774e53 Mon Sep 17 00:00:00 2001
From: Yuwei Zhao <zhaoyuweiteddy at 163.com>
Date: Wed, 12 Aug 2026 23:41:26 +0800
Subject: [PATCH] [clang-format] Preserve compact TableGen bit ranges

TableGen lexes the lower bound of a hyphenated bit range as a negative
integer token. Avoid separating adjacent numeric tokens in TableGen so ranges
such as {24-20} remain compact.

Fixes #177051

Assisted-by: OpenAI Codex
---
 clang/docs/ReleaseNotes.md                    | 3 +++
 clang/lib/Format/TokenAnnotator.cpp           | 6 ++++++
 clang/unittests/Format/FormatTestTableGen.cpp | 7 +++++++
 3 files changed, 16 insertions(+)

diff --git a/clang/docs/ReleaseNotes.md b/clang/docs/ReleaseNotes.md
index df8479a924771..4bdca5431633d 100644
--- a/clang/docs/ReleaseNotes.md
+++ b/clang/docs/ReleaseNotes.md
@@ -644,6 +644,9 @@ features cannot lower the translation-unit ABI level;
   `thread_local`, `extern`, `mutable`, `signed`, `unsigned`, `long`, `short`,
   and `explicit` declaration specifiers.
 
+- Fixed formatting of TableGen bit ranges so that hyphen separators remain
+  compact, as in `{24-20}`. (#GH177051)
+
 ### libclang
 
 - visit identifier initializers in lambda capture as VarDecl instead of VariableRef. Warning: this changes behaviour.
diff --git a/clang/lib/Format/TokenAnnotator.cpp b/clang/lib/Format/TokenAnnotator.cpp
index b6c33279b0aca..349ce2b28ae4a 100644
--- a/clang/lib/Format/TokenAnnotator.cpp
+++ b/clang/lib/Format/TokenAnnotator.cpp
@@ -5208,6 +5208,12 @@ bool TokenAnnotator::spaceRequiredBefore(const AnnotatedLine &Line,
   const bool IsVerilog = Style.isVerilog();
   assert(!IsVerilog || !IsCpp);
 
+  // TableGen lexes the lower bound of a bit range as a negative integer.
+  if (Style.isTableGen() && Left.is(tok::numeric_constant) &&
+      Right.is(tok::numeric_constant) && Right.TokenText.starts_with("-")) {
+    return false;
+  }
+
   // Never ever merge two words.
   if (Keywords.isWordLike(Right, IsVerilog) &&
       Keywords.isWordLike(Left, IsVerilog)) {
diff --git a/clang/unittests/Format/FormatTestTableGen.cpp b/clang/unittests/Format/FormatTestTableGen.cpp
index df20cc26e1094..da0f1b155f2f1 100644
--- a/clang/unittests/Format/FormatTestTableGen.cpp
+++ b/clang/unittests/Format/FormatTestTableGen.cpp
@@ -216,6 +216,13 @@ TEST_F(FormatTestTableGen, ValueSuffix) {
                "}");
 }
 
+TEST_F(FormatTestTableGen, BitRanges) {
+  verifyFormat("def Ranges {\n"
+               "  let Inst{24-20} = rs2;\n"
+               "  let Inst{19-15, 11-7} = rs1;\n"
+               "}");
+}
+
 TEST_F(FormatTestTableGen, PasteOperator) {
   verifyFormat("def Paste#\"Operator\" { string Paste = \"Paste\"#operator; }");