[clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)

Lucas Chollet via cfe-commits cfe-commits at lists.llvm.org
Sat Jul 25 15:05:31 PDT 2026

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LucasChollet wrote:

I don't have write permission, could one of you please merge this for me?

https://github.com/llvm/llvm-project/pull/206206

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