[clang] [CIR][AArch64] Upstream narrowing-addition NEON builtins (PR #204989)

Vicky Nguyen via cfe-commits cfe-commits at lists.llvm.org
Wed Jun 24 20:47:00 PDT 2026


================
@@ -1191,12 +1191,17 @@ Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(
     return Builder.CreateBitCast(Ops[0], Ty);
   }
   case NEON::BI__builtin_neon_vaddhn_v: {
+    // SrcTy has double-width elements (e.g. <8 x i16> when VTy is <8 x i8>).
     llvm::FixedVectorType *SrcTy =
         llvm::FixedVectorType::getExtendedElementVectorType(VTy);
 
-    // %sum = add <4 x i32> %lhs, %rhs
+    // Example: vaddhn_s16(int16x8_t, int16x8_t)
+    // Ops are <16 x i8>, SrcTy is <8 x i16> -> mismatch
----------------
iamvickynguyen wrote:

> Note that for vaddhn_s16(int16x8_t, int16x8_t), the Ops are actually <8 x i16>  ;-) Then, since vaddhn_s16 expands to: `__ret = (int8x8_t) __builtin_neon_vaddhn_v((int8x16_t)__p0, (int8x16_t)__p1, 0);` the arguments to __builtin_neon_vaddhn_v are indeed  <16 x i8>. It's a subtle and a tricky thing to document. It might be easier to skip the comment.

Thank you! That's a good point! I agree that trying to explain <8 x i16> -> <16 x i8> is quite confusing :smile: I've removed the comments in ARM.cpp

> OK, could you try using deriveNeonSISDIntrinsicOperandTypes (or something similar) instead? Basically, we want the code to be shared.
> EDIT Btw, it's no problem if there's no easy solution here!

Thank you for the suggestion! I gave `deriveNeonSISDIntrinsicOperandTypes` a try, but it didn't work for `vraddhn`. It's because the function gets the argument types from the operands, but `vraddhn` has already changed <8 x i16> to <16 x i8>, so we can't get <8 x i16> back.

So I tried to create a helper to group `vraddhn` with the above block, but it needed a hardcoded `builtinID == vraddhn` to decide to widen the source type or not. To keep this clean for future intrinsics, I added a `WidenArgs` flag to `AArch64CodeGenUtils.h`. I keep it as a separate commit. Not sure how you feel about that approach :smile: For now, we only have 1 intrinsic uses that flag, but maybe narrowing-subtraction would use it too (I'm happy to pick it up if no one has already on it :grinning: )

https://github.com/llvm/llvm-project/pull/204989


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