[clang] [CIR][RISCV] Support vector buitlins codegen (PR #199889)

[Pengcheng Wang via cfe-commits]

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@@ -226,6 +226,9 @@ clang_tablegen(riscv_vector_builtins.inc -gen-riscv-vector-builtins
 clang_tablegen(riscv_vector_builtin_cg.inc -gen-riscv-vector-builtin-codegen
   SOURCE riscv_vector.td
   TARGET ClangRISCVVectorBuiltinCG)
+clang_tablegen(riscv_vector_builtin_cir_cg.inc -gen-riscv-vector-builtin-cir-codegen
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wangpc-pp wrote:

Should this be guarded by `if(CLANG_ENABLE_CIR)`?

https://github.com/llvm/llvm-project/pull/199889