[clang] [llvm] [AMDGPU] Add async variants of tensor load/store LDS intrinsics. (PR #200775)

Ryan Mitchell via cfe-commits cfe-commits at lists.llvm.org
Mon Jun 1 08:50:20 PDT 2026


RyanRio wrote:

> -1 on adding async variants
> 
> These intrinsics, just like `global.{load,store}.async.{to,from}.lds.*` on gfx1250, should only use asyncmark / asyncwait and don't need a new "async" variant.
> 
> The only reason that gfx9 has "sync" and "async" variants is because we tried to infer the memory accesses patterns for those DMAs on gfx9 before we realized that that was hard to do for software pipelined/high-performance workloads.
> 
> Because the tensor DMAs already have their own separate counter, they naturally slot into the asyncmark/asyncwait system and will never have a "sync" variant.
> 
> Therefore, this patch can be simplified significantly.

Yea agreed, but I'm thinking that these should actually be renamed to represent that. So only have the async variant, in name and function.

https://github.com/llvm/llvm-project/pull/200775


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