[clang] [Clang/AMDGPU] Allow zero sized arrays in HIP device code (PR #195716)

[Brendon Cahoon via cfe-commits]

bcahoon wrote:

> > The summary is that HIP doesn't define the semantics of how this should be handled. Also, nvcc generates an error message for this.
> 
> NVCC working or not isn't that important, their compilation is fundamentally different and there's plenty of code that doesn't compile with clang in CUDA mode that compiles with nvcc and vice-versa. HIP is just C++ with some magic attributes more or less, so I figured we'd just inherit the GCC extension behavior here. The original PR only limited it for the device, which doesn't make much sense to me.

I think it does make sense to generate an error rather than silently ignore an error condition.

https://github.com/llvm/llvm-project/pull/195716