[clang] [Clang/AMDGPU] Allow zero sized arrays in HIP device code (PR #195716)
Brendon Cahoon via cfe-commits
cfe-commits at lists.llvm.org
Mon May 4 13:02:04 PDT 2026
bcahoon wrote:
> > Discussion about this in SWDEV-449592
>
> Can you summarize it here for people without AMD VPN access?
The summary is that HIP doesn't define the semantics of how this should be handled. Also, nvcc generates an error message for this.
https://github.com/llvm/llvm-project/pull/195716
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