[clang] [Clang][AArch64] Fix wrong SIMD register counting for MFloat8 (PR #195134)

Paul Walker via cfe-commits cfe-commits at lists.llvm.org
Fri May 1 02:31:27 PDT 2026

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https://github.com/paulwalker-arm approved this pull request.


https://github.com/llvm/llvm-project/pull/195134

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