[clang] [llvm] [AArch64][clang][llvm] Add support for Armv9.7-A lookup table intrinsics (PR #187046)

[Kerry McLaughlin via cfe-commits]

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@@ -0,0 +1,37 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve2p3 < %s | FileCheck %s
+
+define <vscale x 16 x i8> @luti6_i8(<vscale x 16 x i8> %a) {
+; CHECK-LABEL: luti6_i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $z0 killed $z0 def $z0_z1
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kmclaughlin-arm wrote:

Adding `-enable-subreg-liveness` to the `RUN` line should remove this.

https://github.com/llvm/llvm-project/pull/187046