[clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)

[Jay Foad via cfe-commits]

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@@ -311,9 +321,16 @@ std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
   case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
     return getLit32Encoding(static_cast<uint32_t>(Imm), STI);
 
-  case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_I64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false);
+    // Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
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jayfoad wrote:

IsInt/IsUInt is just an implementation detail. Don't keep repeating it in comments.

https://github.com/llvm/llvm-project/pull/186575