[clang] [CIR][AArch64] Upstream vrshrd_n_s64/u64 and vrshr_n_v vector rounding shift right (PR #185992)
Andrzej Warzyński via cfe-commits
cfe-commits at lists.llvm.org
Thu Mar 12 04:57:13 PDT 2026
================
@@ -409,301 +407,6 @@ static const ARMVectorIntrinsicInfo AArch64SIMDIntrinsicMap[] = {
NEONMAP1(vxarq_u64, aarch64_crypto_xar, 0),
};
-// Single-Instruction-Single-Data (SISD) intrinsics.
----------------
banach-space wrote:
> NEONMAP2(vrshr_n_v, ...) and NEONMAP2(vrshrq_n_v, ...) from AArch64SIMDIntrinsicMap — removed so these builtins fall through to the second switch where the implementation now lives, instead of being intercepted by findARMVectorIntrinsicInMap and routed to emitCommonNeonBuiltinExpr where they hit an NYI block.
Please note that we want the implementation to match the original codegen as much as possible, see point 3 in "Implementation requirements" in https://github.com/llvm/llvm-project/issues/185382. "Moving" `case`s would mean diverging from that.
https://github.com/llvm/llvm-project/pull/185992
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